DS893 Datasheet, PDF (35/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Input/Output Delay Switching Characteristics
Table 33: Input/Output Delay Switching Characteristics
Symbol
Description
Speed Grades and
V_CCINT Operating Voltages
1.0V
0.95V
Units
-3
-1H
-2
-1
F_REFCLK
REFCLK frequency (component
mode).
200 to 800 200 to 800 200 to 800 200 to 800
REFCLK frequency (native mode). 200 to 2400 200 to 2400 200 to 2400 200 to 2133
MHz
MHz
T_{MINPER_RST}
Minimum reset pulse width.
52.00
ns
T_{IDELAY_RESOLUTION}/
T_{ODELAY_RESOLUTION}
IDELAY/ODELAY chain resolution.
2.5 to 15
ps
DSP48 Slice Switching Characteristics
Table 34: DSP48 Slice Switching Characteristics
Symbol
Description
Maximum Frequency
F_MAX
F_{MAX_PATDET}
F_{MAX_MULT_NOMREG}
F_{MAX_MULT_NOMREG_PATDET}
With all registers used.
With pattern detector.
Two register multiply without MREG.
Two register multiply without MREG with pattern
detect.
F_{MAX_PREADD_NOADREG}
F_{MAX_NOPIPELINEREG}
F_{MAX_NOPIPELINEREG_PATDET}
Without ADREG.
Without pipeline registers (MREG, ADREG).
Without pipeline registers (MREG, ADREG) with
pattern detect.
Speed Grades and
V_CCINT Operating Voltages
1.0V
0.95V
-3
-1H
-2
-1
741 661 661 594
687 581 581 512
462 429 429 361
428 387 387 326
468 429 429 358
335 312 312 260
316 286 286 238
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
DS893 (v1.7.1) April 4, 2016
Product Specification
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