DS893 Datasheet, PDF (36/77 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Virtex UltraScale FPGAs Data Sheet: DC and AC Switching Characteristics
Clock Buffers and Networks
Table 35: Clock Buffers Switching Characteristics
Symbol
Description
Speed Grades and
V_CCINT Operating Voltages
1.0V
0.95V
-3
-1H
-2
-1
Global Clock Switching Characteristics (Including BUFGCTRL)
F_MAX
Maximum frequency of a global clock tree (BUFG).
850
725
725
630
Global Clock Buffer with Input Divide Capability (BUFGCE_DIV)
F_MAX
Maximum frequency of a global clock buffer with input divide
capability (BUFGCE_DIV).
850
725
725
630
Global Clock Buffer with Clock Enable (BUFGCE)
F_MAX
Maximum frequency of a global clock buffer with clock
enable (BUFGCE).
850
725
725
630
Leaf Clock Buffer with Clock Enable (BUFCE_LEAF)
F_MAX
Maximum frequency of a leaf clock buffer with clock enable
(BUFCE_LEAF).
850
725
725
630
GTH/GTY Clock Buffer with Clock Enable and Clock Input Divide Capability (BUFG_GT)
F_MAX
Maximum frequency of a serial transceiver clock buffer with
clock enable and clock input divide capability.
512
512
512
512
Units
MHz
MHz
MHz
MHz
MHz
DS893 (v1.7.1) April 4, 2016
Product Specification
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