XC5000 Datasheet, PDF (31/48 Pages) Xilinx, Inc – High-density family of Field-Programmable Gate Arrays

R
Longline Switching Characteristic Guidelines
Testing of the switching parameters is modeled after testing methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Since many internal timing parameters cannot be measured directly, they are derived from
benchmark timing patterns. The following guidelines reflect worst-case values over the recommended operating
conditions. For more detailed, more precise, and more up-to-date timing information, use the values provided by the
XACT timing calculator and used in the simulator.
Speed Grade -6
-5
-4
Description
Symbol Device
Max
(ns)
Max
(ns)
Max
(ns)
TBUF driving a Longline
TS
I
O
TBUF
I to Longline, while TS is Low; i.e., buffer is constantly active
T_IO
XC5202
XC5204
XC5206 4.0
3.6
XC5210 4.0
3.6
XC5215
TS going Low to Longline going from floating High or Low to
active Low or High
T_ON
XC5202
XC5204
XC5206 5.3
4.8
XC5210 5.3
4.8
XC5215
TS going High to TBUF going inactive, not driving Longline
T_OFF
XC5202
XC5204
XC5206 2.4
2.2
XC5210 2.4
2.2
XC5215
Note: 1. Die-size-dependent parameters are based upon XC5210 characterization. Production specifications will vary with array
size.
27