XC5000 Datasheet, PDF (17/48 Pages) Xilinx, Inc – High-density family of Field-Programmable Gate Arrays

R
To GRM
M0-M23
24
8
Global Nets
4
TS
North
4
South
4
East
4
West
4
5
Input
5
Multiplexers
5
Direct North
4 _Feedback
4
5
CLK
CE
CLR
COUT ⁴
CLB
3
LC3
3
LC2 _{VCC /GND}
LC1
3
3
LC0
To
Longlines
4 _{and GRM}
TQ0-TQ3
Output
Multiplexers
8
4
4
Direct to
East
CIN
Direct West
4
4
Direct South
X5724
Figure 10. VersaBlock Details
13