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DS681 Datasheet, PDF (29/56 Pages) Xilinx, Inc – Fast look-ahead carry logic
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Table 26: Test Methods for Timing Measurement at I/Os
Signal Standard
(IOSTANDARD)
Single-Ended
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
PCI33_3
Rising
Falling
HSTL_I
HSTL_III
HSTL_I_18
HSTL_II_18
HSTL_III_18
SSTL18_I
SSTL18_II
SSTL2_I
SSTL2_II
SSTL3_I
SSTL3_II
Differential
LVDS_25
LVDS_33
BLVDS_25
MINI_LVDS_25
MINI_LVDS_33
LVPECL_25
LVPECL_33
RSDS_25
RSDS_33
TMDS_33
PPDS_25
PPDS_33
DIFF_HSTL_I
DIFF_HSTL_III
DIFF_HSTL_I_18
DIFF_HSTL_II_18
DIFF_HSTL_III_18
VREF (V)
-
-
-
-
-
-
-
Inputs
VL (V)
0
0
0
0
0
0
Note 3
VH (V)
3.3
3.3
2.5
1.8
1.5
1.2
Note 3
0.75
0.9
0.9
0.9
1.1
0.9
0.9
1.25
1.25
1.5
1.5
-
-
-
-
-
-
-
-
-
-
-
-
0.75
0.9
0.9
0.9
1.1
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.75
VREF – 0.75
VREF – 0.75
VREF – 0.75
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.75
VREF + 0.75
VREF + 0.75
VREF + 0.75
VICM – 0.125
VICM – 0.125
VICM – 0.125
VICM – 0.125
VICM – 0.125
VICM – 0.3
VICM – 0.3
VICM – 0.1
VICM – 0.1
VICM – 0.1
VICM – 0.1
VICM – 0.1
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VREF – 0.5
VICM + 0.125
VICM + 0.125
VICM + 0.125
VICM + 0.125
VICM + 0.125
VICM + 0.3
VICM + 0.3
VICM + 0.1
VICM + 0.1
VICM + 0.1
VICM + 0.1
VICM + 0.1
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
VREF + 0.5
Outputs
RT (Ω)
VT (V)
1M
0
1M
0
1M
0
1M
0
1M
0
1M
0
25
0
25
3.3
50
0.75
50
1.5
50
0.9
25
0.9
50
1.8
50
0.9
25
0.9
50
1.25
25
1.25
50
1.5
25
1.5
50
1.2
50
1.2
1M
0
50
1.2
50
1.2
N/A
N/A
N/A
N/A
50
1.2
50
1.2
50
3.3
50
0.8
50
0.8
50
0.75
50
1.5
50
0.9
50
0.9
50
1.8
DS681 (v1.1) February 3, 2009
Product Specification
www.xilinx.com
Inputs and
Outputs
VM (V)
1.4
1.65
1.25
0.9
0.75
0.6
0.94
2.03
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VICM
VREF
VREF
VREF
VREF
VREF
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