DS711 Datasheet, PDF (25/42 Pages) Xilinx, Inc – LogiCORE IP PLBV46 to AXI

LogiCORE IP PLBV46 to AXI Bridge (v2.01.a)
Table 13: PLB Transaction to AXI Transaction (Cont’d)
PLB Transaction
AXI Transaction
Description
4 word cacheline read or
write
Burst read or write of WRAP type with burst length
as 4.
AXI is always target word first.
8 word cacheline read or
write
Burst read or write of WRAP type with burst length
as 8
AXI is always target word first.
Word Burst read or write of Burst read or write of INCR type with burst length One PLB burst transaction is translated to
length 2 to 16
as 2 to 16 respectively.
one AXI burst transaction.
Double word burst read or
write of length 2 to 16
Burst read or write of INCR type with burst length
as 4 to 32 respectively when the
SPLB_NATIVE_DWIDTH is 32. Burst read or write
of INCR type with burst length as 2 to 16
respectively, when the SPLB_NATIVE_DWIDTH is
64.
One PLB burst transaction is translated to
one AXI burst transactions.
Word/Double word Burst
read or write that crosses
4KB boundary
Burst read or write of INCR type with burst lengths
that depends on the requested address and length
of PLB transfer.
One PLB burst transaction is translated to
two AXI burst transactions.
Timing Diagrams
The following timing diagrams illustrate the PLBV46 to AXI Bridge operation for various read and
write transfers.
• PLB single write transfer is shown in Figure 7.
• PLB single read transfer is shown in Figure 8.
• PLB 4 word line write transfer are shown in Figure 9.
• PLB 8 word line read transfers are shown in Figure 10.
• PLB Burst write of length 15 transfer are shown in Figure 11.
• PLB Burst read of length 16 transfer are shown in Figure 12.
• PLB Burst Write of length 10 that crosses 4 KB boundary is shown in Figure 13. One PLB transfer is split into
two transfers on AXI as 4 KB boundary is crossed.
• PLB Burst Read of length 10 that crosses 4 KB boundary is shown in Figure 14. One PLB transfer is split into
two transfers on AXI as 4 KB boundary is crossed.
• PLB back to back read and write transfers are shown in Figure 15.
• PLB Single Write and Read transfer to the PLBV46 to AXI Bridge register DGIE is shown in Figure 16.
DS711 July 25, 2012
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Product Specification