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DS711 Datasheet, PDF (23/42 Pages) Xilinx, Inc – LogiCORE IP PLBV46 to AXI
LogiCORE IP PLBV46 to AXI Bridge (v2.01.a)
Table 10: Slave Error Address Register (SEAR) Bit Definitions
Bit(s) Name Core Access Reset Value Description
0-31
Address
(0 to 31)
R[1]
Zeros
Transaction Address(0-31):
This value reflects the PLB address (0 to 31) qualifier at the time of
error capture. If the PLB Address bus is wider than 32 bits, this
register contains the Least Significant 32-bit slice of the address.
Notes:
1. This register is cleared by the user application through a reset or a write to the SESR address with a data value of 0xA0000000.
Device Global Interrupt Enable Register (DGIE)
The Device Global Interrupt Enable Register provides the final enable/disable for the interrupt output and resides
in the Register and Interrupt Module. It is a read/write register addressed at an offset 0x8 from base address
C_SPLB_BRIDGE_BASEADDR. If interrupts are globally disabled (the DGIE bit is set to ’0’), there is no interrupt
from the bridge under any circumstances. This is a single bit read/write register as shown in Figure 5. Table 11
shows the DGIE bit definitions.
X-Ref Target - Figure 5
5NUSED
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Figure 5: Device Global Interrupt Enable Register (DGIE)
Table 11: Device Global Interrupt Enable Register (DGIE) Bit Definitions
Bit(s)
Name
Core
Access
Reset
Value
Description
0 to 30
Unused
N/A
0
Unused
31
DGIE
Read/Write ’0’
Device Global Interrupt Enable:
Master Enable for routing Device Interrupt to the System Interrupt
Controller.
’1’ = Enabled
’0’ = Disabled
Device Interrupt Enable Register (DIER)
The Device Interrupt Enable Register (DIER) is shown in Figure 6. It is a read/write register addressed at an offset
0xC from base address C_SPLB_BRIDGE_BASEADDR. The bit definitions of this register are as shown in Table 12.
The Device Global Interrupt Enable Register provides the final enable/disable for the interrupt output to the
processor and resides in the Register and Interrupt Module.
X-Ref Target - Figure 6
5NUSED
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Figure 6: Device Interrupt Enable Register (DIER)
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DS711 July 25, 2012
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Product Specification