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DS711 Datasheet, PDF (21/42 Pages) Xilinx, Inc – LogiCORE IP PLBV46 to AXI
LogiCORE IP PLBV46 to AXI Bridge (v2.01.a)
Register Descriptions
Table 8 shows all the PLBV46 to AXI Bridge registers and their addresses. These registers are enabled by setting
C_EN_ERR_REGS to 1. The registers are not used when C_SPLB_SUPPORT_BURSTS = 0 as no posted writes and
out of order reads are supported.
Table 8: PLBV46 to AXI Bridge Registers (1)
Base Address + Offset (hex)
Register
Name
C_SPLB_BRDIGE BASEADDR + 0x0
SESR
C_SPLB_BRIDGE_BASEADDR + 0x4
SEAR
C_SPLB_BRIDGE_BASEADDR + 0x8
DGIE
C_SPLB_BRIDGE_BASEADDR + 0xC
DIER
Access
Type
R/W(2)
R(3)
R/W
R/W
Default Value
(hex)
0x0
0x0
0x0
0x0
Description
Slave Error Status Register
Slave Error Address Register
Device Global Interrupt Enable
Register
Device Interrupt Enable Register
Notes:
1. These registers are included only when C_EN_ERR_REGS is set to 1.
2. This register is written with a data value of 0xA0000000 to reset SESR and SEAR.
3. Read only register. Writing into this register has no effect.
Slave Error Status Register (SESR) and Slave Error Address Register (SEAR)
The following section details the register descriptions of the SESR and SEAR. These registers are included only
when C_EN_ERR_REGS is set to 1.
They are used to provide transaction error information to the user application. When these registers are enabled, a
Base Address Register (BAR) error and slave error or decode error from the AXI causes a capture trigger to occur for
the SESR and the SEAR. The SESR captures the PLB transaction qualifiers and the SEAR captures the PLB address
for the first offending command. When captured, the data is retained until the user application reads the data from
the registers and then rearms the capture mechanism by writing a 0xA0000000 to the SESR address. This write
clears the captured information from the SESR and SEAR. Any other write access to SESR does not generate an error
on the PLB and has no effect.
The assertion of a BAR error, slave error or decode error can be used to generate an interrupt to the user application.
This requires enabling the Device Global Interrupt Enable Register and Device Interrupt Enable Register. This
interrupt can then be used by the user application to signal the need to service the SESR and SEAR.
When C_EN_ERR_REGS is set to 0, the BAR error and errors on AXI cannot be reported to PLB. It is assumed that
the user application does not issue transactions that generate errors on AXI.
The SESR is shown in Figure 3 and detailed in Table 9. The SEAR is shown in Figure 4 and detailed in Table 10.
X-Ref Target - Figure 3
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Figure 3: Slave Error Status Register (SESR)
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DS711 July 25, 2012
www.xilinx.com
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Product Specification