DS680 Datasheet, PDF (10/36 Pages) Xilinx, Inc – Space-Grade Virtex-4QV FPGAs

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Space-Grade Virtex-4QV FPGAs: DC and Switching Characteristics
Table 18: PowerPC 405 Data-Side On-Chip Memory Switching Characteristics
Description
Symbol
Setup and Hold Relative to Clock (BRAMDSOCMCLK)
Data-Side On-Chip Memory data bus inputs
Clock to Out
Data-Side On-Chip Memory control outputs
Data-Side On-Chip Memory address bus outputs
Data-Side On-Chip Memory data bus outputs
T_{PPCDCK_DSOCMRDDB}
T_{PPCCKD_DSOCMRDDB}
T_{PPCCKO_BRAMBWR}
T_{PPCCKO_BRAMABUS}
T_{PPCCKO_IBRAMWRDBUS01}
Table 19: PowerPC 405 Instruction-Side On-Chip Memory Switching Characteristics
Description
Symbol
Setup and Hold Relative to Clock (BRAMISOCMCLK)
Instruction-Side On-Chip Memory data bus inputs
Clock to Out
Instruction-Side On-Chip Memory control outputs
Instruction-Side On-Chip Memory address bus outputs
Instruction-Side On-Chip Memory data bus outputs
Table 20: Processor Block DCR Bus Switching Characteristics
T_{PPCDCK_ISOCMRDDB}
T_{PPCCKD_ISOCMRDDB}
T_{PPCCKO_IBRAMEN}
T_{PPCCKO_IBRAMRDABUS}
T_PPCCKO__IBRAMWRDBUS
Description
Symbol
Setup and Hold Relative to Clock (CPMDCRCLOCK)
Device Control Register Bus control inputs
Device Control Register Bus data inputs
Clock to Out
Device Control Register Bus control outputs
Device Control Register Bus address bus outputs
Device Control Register Bus data bus outputs
T_{PPCDCK_EXDCRACK}
T_{PPCCKD_EXDCRACK}
T_{PPCDCK_EXDCRDBUSI}
T_{PPCCKD_EXDCRDBUSI}
T_{PPCCKO_EXDCRRD}
T_{PPCCKO_EXDCRABUS}
T_{PPCCKO_EXDCRDBUSO}
Table 21: Processor Block APU Interface Switching Characteristics
Description
Symbol
Setup and Hold Relative to Clock (CPMDFCMCLOCK)
APU bus control inputs
APU bus data inputs
Clock to Out
APU bus control outputs
APU bus data outputs
T_{PPCDCK_DCDCREN}
T_{PPCCKD_DCDCREN}
T_{PPCDCK_RESULT}
T_{PPCCKD_RESULT}
T_{PPCCKO_APUFCMDEC}
T_{PPCCKO_RADATA}
Speed
Grade
-10
0.74
0.23
2.65
2.65
2.06
Speed
Grade
-10
0.94
0.23
3.88
2.13
2.14
Speed
Grade
-10
0.15
0.19
1.02
0.27
1.54
1.66
1.67
Speed
Grade
-10
0.42
0.23
0.78
0.23
2.00
2.00
Units
ns Min
ns Max
ns Max
ns Max
Units
ns Min
ns Max
ns Max
ns Max
Units
ns Min
ns Min
ns Max
ns Max
ns Max
Units
ns Min
ns Min
ns Max
ns Max
DS680 (v2.0) April 12, 2010
www.xilinx.com
Product Specification
10