W83977F Datasheet, PDF (77/181 Pages) Winbond – PLUG & PLAY 1.0A COMPLIANT

W83977F/ W83977AF
4.5.3 Reg2 - Mapped IR FIFO Control Register (MP_UFR)
PRELIMINARY
This register is read only. Reading this register returns IR FIFO Control Register (UFR) value of SET
0.
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SSR
Default Value
SSR7
0
SSR6
0
SSR5
0
SSR4
0
SSR3
0
SSR2
0
SRR1
0
SRR0
0
4.5.4 Reg3 - Sets Select Register (SSR)
Reading this register returns E4H. Writing a value selects a Register Set.
Reg.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
SSR
Default Value
SSR7
1
SSR6
1
SSR5
1
SSR4
0
SSR3
0
SSR2
1
Bit 1
SRR1
0
Bit 0
SRR0
0
4.6 Set4 - TX/RX/Timer counter registers and IR control registers.
Address Offset
0
1
2
3
4
5
6
7
Register Name
TMRL
TMRH
IR_MSL
SSR
TFRLL
TFRLH
RFRLL
RFRLH
Register Description
Timer Value Low Byte
Timer Value High Byte
Infrared Mode Select
Sets Select Register
Transmitter Frame Length Low Byte
Transmitter Frame Length High Byte
Receiver Frame Length Low Byte
Receiver Frame Length High Byte
4.6.1 Set4.Reg0, 1 - Timer Value Register (TMRL/TMRH)
This is a 12-bit timer whose resolution is 1ms, that is, the maximum programmable time is 2¹²-1 ms.
The timer is a down-counter and starts counting down when EN_TMR (Enable Timer) of Set4.Reg2 is
set to 1. When the timer counts down to zero and EN_TMR=1, the TMR_I is set to 1 and a new initial
value will be loaded into counter.
4.6.2 Set4.Reg2 - Infrared Mode Select (IR_MSL)
Mode
Bit 7 Bit 6 Bit 5 Bit 4
Bit 3
Advanced IR -
-
-
-
IR_MSL1
Reset Value
0
0
0
0
0
Bit 2
IR_MSL0
0
Bit 1
TMR_TST
0
Bit 0
EN_TMR
0
Bit 7~4:
Bit 3, 2:
Reserved, write to 0.
IR_MSL1, 0 - Infrared Mode Select
Select legacy IR, SIR, or ASK-IR mode. Note that in legacy SIR/ASK-IR user should set
DIS_BACK=1 to avoid backward when programming baud rate.
IR_MSL1, 0
00
01
10
11
Operation Mode Selected
Legacy IR
CIR
Legacy ASK-IR
Legacy SIR
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Publication Release Date: March 1998
Revision 0.58