W83977F Datasheet, PDF (118/181 Pages) Winbond – PLUG & PLAY 1.0A COMPLIANT

W83977F/ W83977AF
7.1 Output Buffer
PRELIMINARY
The output buffer is an 8-bit read-only register at I/O address 60H (Default, PnP programmable I/O
address LD5-CR60 and LD5-CR61). The keyboard controller uses the output buffer to send the scan
code received from the keyboard and data bytes required by commands to the system. The output
buffer can only be read when the output buffer full bit in the register is "1".
7.2 Input Buffer
The input buffer is an 8-bit write-only register at I/O address 60H or 64H (Default, PnP programmable
I/O address LD5-CR60, LD5-CR61, LD5-CR62, and LD5-CR63). Writing to address 60H sets a flag
to indicate a data write; writing to address 64H sets a flag to indicate a command write. Data written
to I/O address 60H is sent to keyboard (unless the keyboard controller is expecting a data byte)
through the controller's input buffer only if the input buffer full bit in the status register is 0 .
7.3 Status Register
The status register is an 8-bit read-only register at I/O address 64H (Default, PnP programmable I/O
address LD5-CR62 and LD5-CR63), that holds information about the status of the keyboard controller
and interface. It may be read at any time.
BIT
BIT FUNCTION
DESCRIPTION
0
Output Buffer Full
1
Input Buffer Full
2
System Flag
0: Output buffer empty
1: Output buffer full
0: Input buffer empty
1: Input buffer full
This bit may be set to 0 or 1 by writing to the system flag
bit in the command byte of the keyboard controller. It
defaults to 0 after a power-on reset.
3
Command/Data
0: Data byte
1: Command byte
4
Inhibit Switch
0: Keyboard is inhibited
1: Keyboard is not inhibited
5
Auxiliary Device Output 0: Auxiliary device output buffer empty
Buffer
1: Auxiliary device output buffer full
6
General Purpose Time- 0: No time-out error
out
1: Time-out error
7
Parity Error
0: Odd parity
1: Even parity (error)
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Publication Release Date: January 1997
Revision 0.50