W83L517D_05 Datasheet, PDF (70/133 Pages) Winbond – LPC I/O for Notebook

W83L517D/W83L517D-F
8.4.4 Reg4 - Advanced IR Control Register 2 (ADCR2)
MODE
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Advanced IR DIS_BACK - PR_DIV1 PR_DIV0 RX_FSZ1 RX_FSZ0 TX_FSZ1 TXFSZ0
Reset Value
0
0
0
0
0
0
0
0
Bit 7:
Bit 6:
Bit 5, 4:
DIS_BACK - Disable Backward Operation
A write to 1 disables backward legacy IR mode. When operating in legacy SIR/ASK-IR
mode, this bit should be set to 1 to avoid backward operation.
Reserved, write 0.
PR_DIV1~0 - Pre-Divisor 1~0.
These bits select pre-divisor for external input clock 24M Hz. The clock goes through the
pre-divisor then input to baud rate divisor of IR.
PR_DIV1~0
00
01
10
11
PRE-DIVISOR
13.0
1.625
6.5
1
MAX. BAUD RATE
115.2K bps
921.6K bps
230.4K bps
1.5M bps
Bit 3, 2:
RX_FSZ1~0 - Receiver FIFO Size 1~0
These bits setup receiver FIFO size when FIFO is enable.
RX_FSZ1~0
00
01
1X
RX FIFO SIZE
16-Byte
32-Byte
Reserved
Bit 1, 0:
TX_FSZ1~0 - Transmitter FIFO Size 1~0
These bits setup transmitter FIFO size when FIFO is enable.
TX_FSZ1~0
00
01
1X
TX FIFO SIZE
16-Byte
32-Byte
Reserved
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