W83L517D_05 Datasheet, PDF (44/133 Pages) Winbond – LPC I/O for Notebook

W83L517D/W83L517D-F
765 43
00 0
21
0
DRATE0
DRATE1
NOPREC
DMAEN
DSKCHG (Bit 7):
This bit indicates the status of DSKCHG# input.
Bit 6-4: These bits are always a logic 1 during a read.
DMAEN (Bit 3):
This bit indicates the value of DO REGISTER bit 3.
NOPREC (Bit 2):
This bit indicates the value of CC REGISTER NOPREC bit.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
DSKCHG
6.2.9 Configuration Control Register (CC Register) (Write base address + 7)
This register is used to control the data rate. In the PC/AT and PS/2 mode, the bit definitions are as
follows:
7 6 5 ^{4 3 21} 0
xxxx xx
DRATE0
DRATE1
X: Reserved
Bit 7-2: Reserved. These bits should be set to 0.
DRATE1 DRATE0 (Bit 1, 0):
These two bits select the data rate of the FDC.
In the PS/2 Model 30 mode, the bit definitions are as follows:
765 43 ²¹ 0
XX XX X
X: Reserved
DRATE0
DRATE1
NOPREC
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