W83L517D_05 Datasheet, PDF (122/133 Pages) Winbond – LPC I/O for Notebook

W83L517D/W83L517D-F
Bit 2: TXW4C
= 0 No transmission delay when SIR is changed from RX mode to TX mode.
= 1 Transmission delays 4 characters-time (40 bit-time) when SIR is changed
from RX mode to TX mode.
Bit 1 : APEDCRC
= 0 No append hardware CRC value as data in FIR/MIR mode.
= 1 Append hardware CRC value as data in FIR/MIR mode.
Bit 0 : ENBNKSEL; Bank select enable
= 0 Disable IR Bank selection.
= 1 Enable IR Bank selection.
12.9 Logical Device 7 ( GPIO Port 1)
CR30 ( Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: = 1 GPIO1 port is Activate
= 0 GPIO1 port is inactive.
CR62, CR 63 (Default 0x00, 0x00 )
These two registers select the GPIO1 base address [0x100:0xFFF] on 4byte boundary.
IO address : CRF1 base address
IO address + 1 : CRF3 base address
IO address + 2 : CRF4 base address
IO address + 3 : CRF5 base address
CR70 (Default 0x09 if PNPCSV = 0 during POR, default 0x00 otherwise when the port is active)
Bit [7:4]: These bits select IRQ resource for IRQIN1.
Bit [3:0]: These bits select IRQ resource for IRQIN0.
CRF0 (GPIO1 selection register. Default 0xFF)
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
CRF1 (GPIO1 data register. Default 0x00 when the port is active)
If a port is programmed to be an output port, then its respective bit can be read/written.
If a port is programmed to be an input port, then its respective bit can only be read.
CRF2 (GP5 inversion register. Default 0x00 when the port is active)
When set to a '1', the incoming/outgoing port value is inverted.
When set to a '0', the incoming/outgoing port value is the same as in data register.
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