W83L517D_05 Datasheet, PDF (3/133 Pages) Winbond – LPC I/O for Notebook

W83L517D/W83L517D-F
7.2.7 Interrupt Control Register (ICR) (Read/Write) ......................................................................53
7.2.8 Programmable Baud Generator (BLL/BHL) (Read/Write).....................................................54
7.2.9 User-defined Register (UDR) (Read/Write) ..........................................................................54
8. INFRARED (IR) PORT .................................................................................................................. 55
8.1 IR Register Description ....................................................................................................... 55
8.2 Set0-Legacy/Advanced IR Control and Status Registers ................................................... 57
8.2.1 Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write) .....................57
8.2.2 Set0.Reg1 - Interrupt Control Register (ICR)........................................................................57
8.2.3 Set0.Reg2 - Interrupt Status Register/IR FIFO Control Register (ISR/UFR) ........................59
8.2.4 Set0.Reg3 - IR Control Register/Set Select Register (UCR/SSR): .......................................62
8.2.5 Set0.Reg4 - Handshake Control Register (HCR) .................................................................63
8.2.6 Set0.Reg5 - IR Status Register (USR) .................................................................................65
8.2.7 Set0.Reg6 - Reserved ..........................................................................................................66
8.3 Set1 - Legacy Baud Rate Divisor Register.......................................................................... 67
8.3.1 Set1.Reg0~1 - Baud Rate Divisor Latch (BLL/BHL) .............................................................67
8.3.2 Set1.Reg 2~7 .......................................................................................................................68
8.4 Set2 - Interrupt Status or IR FIFO Control Register (ISR/UFR) .......................................... 68
8.4.1 Reg0, 1 - Advanced Baud Rate Divisor Latch (ABLL/ABHL) ................................................68
8.4.2 Reg2 - Advanced IR Control Register 1 (ADCR1) ................................................................68
8.4.3 Reg3 - Sets Select Register (SSR).......................................................................................69
8.4.4 Reg4 - Advanced IR Control Register 2 (ADCR2) ................................................................70
8.4.5 Reg6 - Transmitter FIFO Depth (TXFDTH) (Read Only) ......................................................72
8.4.6 Reg7 - Receiver FIFO Depth (RXFDTH) (Read Only)..........................................................72
8.5 Set3 - Version ID and Mapped Control Registers............................................................... 72
8.5.1 Reg0 - Advanced IR ID (AUID).............................................................................................72
8.5.2 Reg1 - Mapped IR Control Register (MP_UCR) ...................................................................73
8.5.3 Reg2 - Mapped IR FIFO Control Register (MP_UFR) ..........................................................73
8.5.4 Reg3 - Sets Select Register (SSR).......................................................................................73
8.6 Set4 - TX/RX/Timer counter registers and IR control registers. ......................................... 73
8.6.1 Set4.Reg0, 1 - Timer Value Register (TMRL/TMRH) ...........................................................74
8.6.2 Set4.Reg2 - Infrared Mode Select (IR_MSL) ........................................................................74
8.6.3 Set4.Reg3 - Set Select Register (SSR) ................................................................................74
8.6.4 Set4.Reg4, 5 - Transmitter Frame Length (TFRLL/TFRLH) .................................................75
8.6.5 Set4.Reg6, 7 - Receiver Frame Length (RFRLL/RFRLH) ....................................................75
8.7 Set 5 - Flow control and IR control and Frame Status FIFO registers................................ 75
8.7.1 Set5.Reg0, 1 - Flow Control Baud Rate Divisor Latch Register (FCDLL/ FCDHL) ...............76
8.7.2 Set5.Reg2 - Flow Control Mode Operation (FC_MD) ...........................................................76
8.7.3 Set5.Reg3 - Sets Select Register (SSR) ..............................................................................76
8.7.4 Set5.Reg4 - Infrared Configure Register 1 (IRCFG1)...........................................................77
8.7.5 Set5.Reg5 - Frame Status FIFO Register (FS_FO) .............................................................77
Publication Release Date: May 23, 2005
-3-
Revision 1.0