W83L517D_05 Datasheet, PDF (103/133 Pages) Winbond – LPC I/O for Notebook

W83L517D/W83L517D-F
9.3.13.1 Mode Switching
Software will execute P1284 negotiation and all operation prior to a data transfer phase under
programmed I/O control (mode 000 or 001). Hardware provides an automatic control line handshake,
moving data between the FIFO and the ECP port only in the data transfer phase (mode 011 or 010).
If the port is in mode 000 or 001 it may switch to any other mode. If the port is not in mode 000 or 001
it can only be switched into mode 000 or 001. The direction can be changed only in mode 001.
When in extended forward mode, the software should wait for the FIFO to be empty before switching
back to mode 000 or 001. In ECP reverse mode the software waits for all the data to be read from the
FIFO before changing back to mode 000 or 001.
9.3.13.2 Command/Data
ECP mode allows the transfer of normal 8-bit data or 8-bit commands. In the forward direction, normal
data are transferred when HostAck is high and an 8-bit command is transferred when HostAck is low.
The most significant bits of the command indicate whether it is a run-length count (for compression) or
a channel address.
In the reverse direction, normal data are transferred when PeriphAck is high and an 8-bit command is
transferred when PeriphAck is low. The most significant bit of the command is always zero.
9.3.13.3 Data Compression
The W83627HF supports run length encoded (RLE) decompression in hardware and can transfer
compressed data to a peripheral. Note that the odd (RLE) compression in hardware is not supported.
In order to transfer data in ECP mode, the compression count is written to the ecpAFifo and the data
byte is written to the ecpDFifo.
9.3.14 FIFO Operation
The FIFO threshold is set in configuration register 5. All data transfers to or from the parallel port can
proceed in DMA or Programmed I/O (non-DMA) mode, as indicated by the selected mode. The FIFO
is used by selecting the Parallel Port FIFO mode or ECP Parallel Port Mode. After a reset, the FIFO is
disabled.
9.3.15 DMA Transfers
DMA transfers are always to or from the ecpDFifo, tFifo, or CFifo. The DMA uses the standard PC
DMA services. The ECP requests DMA transfers from the host by activating the PDRQ pin. The DMA
will empty or fill the FIFO using the appropriate direction and mode. When the terminal count in the
DMA controller is reached, an interrupt is generated and serviceIntr is asserted, which will disable the
DMA.
9.3.16 Programmed I/O (NON-DMA) Mode
The ECP or parallel port FIFOs can also be operated using interrupt driven programmed I/O.
Programmed I/O transfers are to the ecpDFifo at 400H and ecpAFifo at 000H or from the ecpDFifo
located at 400H, or to/from the tFifo at 400H. The host must set the direction, state, dmaEn = 0 and
serviceIntr = 0 in the programmed I/O transfers.
The ECP requests programmed I/O transfers from the host by activating the IRQ pin. The
programmed I/O will empty or fill the FIFO using the appropriate direction and mode.
- 103 -
Publication Release Date: May 23, 2005
Revision 1.0