W681307DG Datasheet, PDF (70/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
11. PROCESSOR INTERFACE
11.1
Overview
The Processor Interface controls reads and writes made by the Processor to the on-chip RAM and on-chip registers.
11.2
Functionality
Figure 11-1 shows the processor interface block diagram.
Figure 11-1 Illustration of the Processor Interface
11.3
Processor Access Sequencer
： The Processor Access Sequencer has 2 functions
• Internal Register access sequencing
• On-Chip RAM access sequencing
External RAM accesses, external ROM accesses and internal register reads are performed directly by the 8032Turbo, the Address
Decoder and Read Multiplexer. No action is required by the Processor Access Sequencer.
The operation of the Processor Access Sequencer for internal register writes is shown in Figure 11-2.
： Note that
• The sequence of a register write is not affected by the setting of STRECH.
• The Internal Register Clock Enable signal SysClock2En is active for 4 cycles to allow internal events to be scheduled after a
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Publication Release Date: May, 2007
Revision 1.3