W681307DG Datasheet, PDF (114/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
14.7
TG Gain Register
Address
0x1507
Access Mode Value At Reset Nominal Value
R/W
0x00
Bit 7
Reserved
Bit 6
Bit 5
Bit 4
TG_A Gain[2] TG_A Gain[1] TG_A Gain[0]
Bit 3
Reserved
Bit 2
Bit 1
Bit 0
TG_B Gain[2] TG_B Gain[1] TG_B Gain[0]
TG Op amp of the Codec is implemented as a two amplifiers cascade to provide the necessary gain for low signal microphone input. The
first stage (TG_A) is designed as a full differential high impendence and low noise amplifier. This amplifier gain can be set as bypass or
maximum gain 18dB for microphone input. The second stage (TG_B) is also full differential amplifier and provides maximum gain 24dB
： ^{for the application requirement. It is according this register to set different gain in the Codec, equivalent architecture is shown in Figure}
14-4. The TG amplifier gain table is listed as below
TG_A Gain[2:0]
Bin
Hex
0000
0
0001
1
0010
2
0011
3
0100
4
0101
5
0110
6
0111
7
Gain [dB]
0 dB
6 dB
12 dB
18 dB
Bypass
Bypass
Bypass
Bypass
TG_B Gain[2:0]
Bin
Hex
0000
0
0001
1
0010
2
0011
3
0100
4
0101
5
0110
6
0111
7
Gain [dB]
0 dB
6 dB
12 dB
18 dB
24 dB
24 dB
24 dB
24 dB
0x1521[0] , 0x1507[6]
0x1521[0]
TI1-
15K 0
15K ,30K , 60K, ^{TI1- 15K}
120K
TI2- 15K
TI2-
15K 1
15K
MUX
1st TG
TI1+
15K 0
15K
TI2+
15K 1
15K ,30K , 60K, ^{TI1+ 15K}
120K
TI2+ 15K
15K ,30K , 60K,
120K, 240K
TG+
2nd TG
TG-
15K ,30K , 60K,
120K, 240K
Figure 14-4 Equivalent schematics for TG Op amp.
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Publication Release Date: May, 2007
Revision 1.3