W681307DG Datasheet, PDF (152/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
18.3.3.3
Address
0x1806
Clear
Access Mode Value At Reset Nominal Value
W
0x00
Bit 7
PlayOn
_Intrpt
Bit 6
RecordOn
_Intrpt
Bit 5
RESERVED
Bit 4
Bit 3
Bit 2
Bit 1
CONNECT USB_ERROR _{Host_RESUME_I} Host_SUSPEND
_Intrpt
_Intrpt
ntrpt
_Intrpt
Bit 0
Host_RESET
_Intrpt
Host_RESET_Intrpt
Host_SUSPEND_Intrpt
Host_RESUME_Intrpt
USB_ERROR_Intrpt
CONNECT_Intrpt
RecordOn_Intrpt
PlayOn_Intrpt
Detection of Reset request.
Detection of Suspend request
Detection of Resume request
Detection of Error request (ex: CRC)
Detection of connect
Detection of Record On
Detection of Play On
18.3.4
18.3.4.1
EndPoint 0 – Control In/Out Registers
Control Register
Address
0x1810
Access Mode Value At Reset Nominal Value
R/W
0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
RESERVED RESERVED RESERVED RESERVED RESERVED
Bit 2
HID_FIFO
_Empty
Bit 1
Bit 0
SDO_RD CTL_IN_RDY
CTL_IN_RDY
SDO_RD
HID_FIFO_Empty
Active High. Control In(EP0) Data is ready. S/W needs to set this bit when they finished writing the Control In
Data (Max: 8 bytes)
Setup or Data out packet is reading for control transfer.
While S/W complete to read the control HID Out Data (0x1820 ~0x1827), set “HID_FIFO_Empty” to High. USB
device will send NAK before “HID_FIFO_Empty” setting to High.
18.3.4.2
Address
0x1811
Control In Data
Access Mode Value At Reset Nominal Value
W/R
0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
CTLI_D [7:0]
CTLI_D Control in Data. Internal FIFO has 8 bytes.
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Publication Release Date: May, 2007
Revision 1.3