W681307DG Datasheet, PDF(3/160 Page) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

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W681307DG Datasheet, PDF (3/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

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W681307

CONTENTS

1. GENERAL DESCRIPTION ..................................................................................................... - 9 -

2. FEATURES ........................................................................................................................... - 10 -

3. PIN CONFIGURATION ....................................................................................................... - 11 -

4. PINS DESCRIPTION ............................................................................................................ - 12 -

5. SYSTEM DIAGRAM............................................................................................................. - 17 -

5.1

Function Block Diagram................................................................................................... - 17 -

5.2

I/O Cells in Winbond MCU Chip .................................................................................... - 18 -

6. ELECTRICAL CHARACTERISTICS ..................................................................................... - 20 -

6.1

Absolute Maximum Ratings............................................................................................. - 20 -

6.2

DC Characteristics............................................................................................................ - 20 -

6.3

Analog Transmission Characteristics ............................................................................... - 21 -

6.3.1

Amplitude Response for Analog Transmission Performance ....................................... - 21 -

6.3.2

Distortion Characteristics for Analog Transmission Performance ................................ - 21 -

6.4

Analog Electrical Characteristics ...................................................................................... - 22 -

6.5

Power Drivers â PO1, 2 .................................................................................................... - 22 -

6.6

Programmable Output Linear Regulator .......................................................................... - 23 -

6.7

USB PHY Electronic Characteristics ( 25Â°C, VDD_USB = 3.3V, DVDD1, 3 =1.9V) ............. - 23 -

6.8

USB PLL Electronic Characteristics ( 25Â°C, AVDD = 3.3V, DVDD1, 3 =1.9V).................... - 24 -

6.9

The Crystal Specification Requirement............................................................................. - 24 -

6.10 Recommended Crystal Specification ................................................................................ - 25 -

7. MEMORY AND REGISTER MAP......................................................................................... - 26 -

7.1

Program Memory Map..................................................................................................... - 26 -

7.2

Data Memory Map........................................................................................................... - 26 -

7.3

Register Map.................................................................................................................... - 27 -

7.3.1

Mixer and Speech Logic Registers Overview ............................................................... - 27 -

7.3.2

Support Logic Registers Overview............................................................................... - 27 -

7.3.3

Interface Logic Registers Overview.............................................................................. - 28 -

7.3.4

Speech Interface Registers Overview ........................................................................... - 28 -

7.3.5

Processor Interface Registers Overview ....................................................................... - 29 -

7.3.6

Transcoder DSP Registers Overview............................................................................ - 29 -

7.3.7

Echo Canceller Registers Overview ............................................................................. - 30 -

7.3.8

Soft Clip Registers Overview ....................................................................................... - 31 -

7.3.9

CODEC Digital Part..................................................................................................... - 31 -

7.3.10

Sounder Path Select ..................................................................................................... - 31 -

7.3.11

Frequency Adjustment of Crystal Oscillator ................................................................ - 31 -

7.3.12

Specific Register........................................................................................................... - 31 -

7.3.13

VAG Selection ............................................................................................................. - 32 -

7.3.14

CODEC Control Register Overview............................................................................. - 32 -

7.3.15

Specific Registers ......................................................................................................... - 32 -

7.3.16

Test Cases and Debugging Registers Overview ........................................................... - 32 -

7.3.17

Charge Park Detection................................................................................................. - 32 -

7.3.18

DA High Pass Filter Selection ...................................................................................... - 33 -

7.3.19

TI PATH Selection ....................................................................................................... - 34 -

7.3.20

Network side / Acoustic side Power Measurement..................................................... - 34 -

7.3.21

PCM Highway Channel Registers Overview ............................................................... - 35 -

7.3.22

SPI Interface Registers Overview ................................................................................. - 35 -

7.3.23

Data Flash SPI Interface Registers Overview................................................................ - 36 -

-3-

Publication Release Date: May, 2007

Revision 1.3

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