W681307DG Datasheet, PDF (137/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
16.7.6
DF_CLK_FORMAT
Address
0x173B
Access Mode Value At Reset Nominal Value
R/W
00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
CSN_MORE CK_MORE
CP
There have 4 control bits (CSN_MORE, CK_MORE, CP and CI) to decide the DF_SPI data format.
CSN_MORE
When set, DF_CSN toggling only while DF_CLK stable.
CK_MORE
Extend one more clock before/after signal DF_CSN active.
CP
DF_CLK transition position setting.
When CP = 1, DF_CLK start toggling in the middle of transfer.
When CP = 0, DF_CLK start toggling at the beginning of transfer.
CI
DF_CLK level while DF_CSN is non active.
When CI = 1, DF_CLK is high while DF_CSN is non active.
When CI = 0, DF_CLK is low while DF_CSN is non active.
CSN_MORE When set, DF_CSN toggling only while DF_CLK stable.
Bit 0
CI
CK_MORE
Extend one more clock before/after signal DF_CSN active.
CP
DF_CLK transition position setting.
-- When CP = 1, DF_CLK start toggling in the middle of transfer.
-- When CP = 0, DF_CLK start toggling at the beginning of transfer.
- 137 -
Publication Release Date: May, 2007
Revision 1.3