W681307DG Datasheet, PDF (111/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
14.3
Sounder Signal Selection
Address
0x1503
Access Mode Value At Reset Nominal Value
R/W
0x00
Bit 7
Bit 6
Bit 5
Blocked
(for test modes)
RESERVED
Rclk_SNDR_SE
L
Bit 4
Bit 3
RefClkSel
Bit 2
RefClkOn
Bit 1
PDMEN
Bit 0
SNDRSigSel
There are two sounders signal to be selected to connect to SNDR pin. This subsection describes the sounder signal of PDM (Pulse Density
Modulation) format. The selection of different sounder signal and the related control bits are shown in 0x1503[1:0].
PDMEN
When set, the TX path of CODEC will be hardware muted, the over sampled DTMF signal is switched to
sounder signal path. So except to generate sounder signal, this bit should be reset to 0 while CODEC is
active.
SNDRSigSel
When set, the sounder signal comes from the DTMF generator in the speech processor. The DTMF signal
will be over sampled to 1 bit signal, which is called Pulse Density Modulation (PDM) format. The PDM
format signal then connects to pin SNDR while PDMRingEN=1. The control registers of DTMF generator
are allocated from addresses 1488H~148CH
=0, the sounder signal comes from the Ringer Tone Generator with Pulse Width Modulation (PWM) format.
The control registers of Ringer Tone Generator are allocated from addresses 1447H~144AH
RefClkOn
When set, enable Reference Clock Generation circuit.
RefClkSel
Reference clock rate selection.
RefClkSel[4:3]
0
1
2
3
Reference Clk Rate
13.824 MHz
6.912 MHz
3.456 MHz
1.728 MHz
Rclk_SNDR_Sel
Switch the function of pin SNDR. Set “1” to configure the SNDR pin as RefClock output.
Set ”0” to configure the SNDR pin as SNDR output.
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Publication Release Date: May, 2007
Revision 1.3