W681307DG Datasheet, PDF (119/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
14.9.4
Specific Register
Address
0x150A
Access Mode Value At Reset Nominal Value
R/W
0x00
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Blocked (for test modes)
14.9.5
Specific Register
Address
0x150B
Access Mode Value At Reset Nominal Value
R/W
0x00
Bit 7
Bit 6
Blocked
(for test modes)
RESERVED
Bit 5
RESERVED
Bit 4
RESERVED
Bit 3
Bit 2
Bit 1
Bit 0
Blocked
Blocked
Blocked
Blocked
(for test modes) (for test modes) (for test modes) (for test modes)
14.10
RECEIVE_DIAG
Address
0x150C
Access Mode
R/W
Value At Reset
0x00
Nominal Value
Bit 7
Reserved
Bit 6
P3.5_A1
_Sel
Bit 5
P3.4_A0
_Sel
Bit 4
Bit 3
Bit 2
CS3_Enable P1.4_WaitState_Sel P1.5_Sel
Bit 1
P1.6_Sel[1]
Bit 0
P1.6_Sel[0]
B[1:0] P1.6_Sel[1:0]=
0, Pin 44= P1.6
Port 1 Bit 6 of embedded T8032.
1, Pin 44= X
Undefined. signal.
2, Pin 44= X
Undefined. signal.
3, Pin 44= P1.6
Port 1 Bit 6 of embedded T8032.
B[2] P1.5_Sel=
0 Pin 45= P1.5 or /CS3
Port 1 Bit 5 of embedded T8032 or External chip select.
1 Pin 45= X
Undefined. signal
B[3] P1.4_waitstate_sel=
0, Pin 46= P1.4
Port 1 Bit 4 of embedded T8032.
1, Pin 46= wait state input
The input pin with pull-high can receive wait signal from
external device.
B[4] CS3_Enable=
0 Pin 45= P1.5
Port 1 Bit 5 of embedded T8032.
1 Pin 45= /CS3
External chip select.
B[5] P3.4_A0_Sel=
0, Pin37= P3.4
Port 3 Bit 4 of embedded T8032.
1, Pin37= A0
A0 address of embedded T8032.
B[6] P3.5_A1_Sel=
0, Pin36= P3.5
Port 3 Bit 5 of embedded T8032.
1, Pin36= A1
A1 address of embedded T8032.
※ If KR is used as GPIO function besides setting SPI_Enable 0x1720 [7] = 0 (disable SPI), 0x150C [7] must be set “0”.
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Publication Release Date: May, 2007
Revision 1.3