W681307DG Datasheet, PDF (14/160 Pages) Winbond – USB1.1 CODEC Microprocessor Control Unit with 32KB Mask ROM and 4KB RAM.

W681307
58 RESETOUT O
L
H
59
DVDD5 PWR -
-
60
DGND5 PWR -
-
61
NC
O Tristate Tristate
62 SYSCLKOUT O Tristate
L
63
NC
O Tristate Tristate
64
NC
O Tristate Tristate
65
NC
O Tristate Tristate
66
NC
O Tristate Tristate
67
NC
O Tristate Tristate
68
NC
O Tristate Tristate
69
NC
O Tristate Tristate
70
NC
O Tristate Tristate
71
NC
O Tristate Tristate
72
NC
O Tristate Tristate
73
NC
I
Hi-Z
Hi-Z
74
AGND2 PWR -
-
75
PO1P
O Tristate Tristate
76
PO1N
O Tristate Tristate
77
PO2P
O Tristate Tristate
78
PO2N
O Tristate Tristate
79
AVDD2 PWR -
-
80
AVDD1 PWR -
-
81 RESETC
O Tristate Tristate
82 REG_CTRL O Active Active
83
VAG
O Tristate 1.5V
84
VBGP
O 1. 0V 1.0V
85
AGND1 PWR -
-
86
TI1+
I
Hi-Z
Hi-Z
87
TI1-
I
Hi-Z
Hi-Z
88
TI2+
I
Hi-Z
Hi-Z
89
TI2-
I
Hi-Z
Hi-Z
PC3o01
PVDDC
PVSSC
PC3T02
PC3T02
PC3T02
PC3T01
PC3B01
PC3T01
PC3T01
PC3T02
PC3T02
PC3T02
PC3T01
Analog
Analog
PVSSC
PAnalog
PAnalog
PAnalog
PAnalog
PVDDC
PVDDC
PAnalog
PAnalog
PAnalog
Panalog
Chip reset indication output. Active high after the reset state.
Digital supply voltage 5 (for digital I/O pads power)
Digital ground 5 (I/O ground)
No connection
13.824 MHz system clock output
No connection
No connection
No connection
No connection
No connection
No connection
No connection
No connection
No connection
No connection
No connection
Analog ground for OP2 output amplifier
Power amplifier output (non-inverting) - This pin is the non-
inverting power amplifier output, which is an inverted
version of the signal at PO1N. This pin is capable of driving
a 120 Ω load to PO1N at 3V supply power. This pin is D.C.
referred to the VAG pin. This pin is tri-state when the chip is
in analog CODEC power down mode.
Power amplifier output (inverting) - This pin is the inverting
power amplifier output. This pin is capable of driving a 120
Ω load to PO1P at 3V supply voltage. This pin is D.C.
referenced to the VAG pin. The PO1P and PO1N outputs are
differential. This pin is tri-state when the chip is in analog
CODEC power down mode.
Power amplifier output (non-inverting) - This pin is the non-
inverting power amplifier output, which is an inverted
version of the signal at PO2N. This pin is capable of driving
a 16 Ω load to PO2N at 3V supply power. This pin is D.C.
referred to the VAG pin. This pin is tri-state when the chip is
in analog CODEC power down mode.
Power amplifier output (inverting) - This pin is the inverting
power amplifier output. This pin is capable of driving a 16 Ω
load to PO2P at 3V supply voltage. This pin is D.C.
referenced to the VAG pin. The PO2P and PO2N outputs are
differential. This pin is tri-state when the chip is in analog
CODEC power down mode.
Analog supply voltage for OP2 amplifier
Analog supply voltage
It should connect a capacitor for internal power on reset
circuit.
Output signal of 3V linear regulator to drive the PNP
transistor.
Analog reference voltage. This pin possesses the analog
virtual ground of internal CODEC circuits.
The Band gap output voltage. It is 1.0V volt typically.
PVSSC Analog ground
PAnalog
PAnalog
PAnalog
PAnalog
This is the non-inverting input of the transmission
operational amplifier TG1.
This is the inverting input of the transmission operational
amplifier TG1.
This is the non-inverting input of the transmission
operational amplifier TG2.
This is the non-inverting input of the transmission
operational amplifier TG2.
- 14 -
Publication Release Date: May, 2007
Revision 1.3