LM3S6G11 Datasheet, PDF (96/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Cortex-M3 Peripherals
3.1.4.2
Example of SRD Use
Two regions with the same base address overlap. Region one is 128 KB, and region two is 512 KB.
To ensure the attributes from region one apply to the first 128 KB region, configure the SRD field for
region two to 0x03 to disable the first two subregions, as Figure 3-1 on page 96 shows.
Figure 3-1. SRD Use Example
Region 1
Base address of both regions
Region 2, with
subregions
Offset from
base address
512KB
448KB
384KB
320KB
256KB
192KB
128KB
Disabled subregion
64KB
Disabled subregion
0
MPU Access Permission Attributes
The access permission bits, TEX, S, C, B, AP, and XN of the MPUATTR register, control access to
the corresponding memory region. If an access is made to an area of memory without the required
permissions, then the MPU generates a permission fault.
Table 3-3 on page 96 shows the encodings for the TEX, C, B, and S access permission bits. All
encodings are shown for completeness, however the current implementation of the Cortex-M3 does
not support the concept of cacheability or shareability. Refer to the section called “MPU Configuration
for a Stellaris Microcontroller” on page 97 for information on programming the MPU for Stellaris
implementations.
Table 3-3. TEX, S, C, and B Bit Field Encoding
TEX
000b
000
000
000
000
000
001
001
001
001
001
001
S
C
B
Memory Type
x^a
0
0
Strongly Ordered
x^a
0
1
Device
0
1
0
Normal
1
1
0
Normal
0
1
1
Normal
1
1
1
Normal
0
0
0
Normal
1
0
0
Normal
x^a
0
1
Reserved encoding
x^a
1
0
Reserved encoding
0
1
1
Normal
1
1
1
Normal
010
x^a
0
0
Device
010
x^a
0
1
Reserved encoding
010
x^a
1
x^a
Reserved encoding
Shareability
Shareable
Shareable
Not shareable
Shareable
Not shareable
Shareable
Not shareable
Shareable
-
-
Not shareable
Shareable
Not shareable
-
-
Other Attributes
-
-
Outer and inner
write-through. No write
allocate.
Outer and inner
noncacheable.
-
-
Outer and inner
write-back. Write and
read allocate.
Nonshared Device.
-
-
96
July 24, 2012
Texas Instruments-Production Data