LM3S6G11 Datasheet, PDF (665/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6G11 Microcontroller
15.3.3.1
Clock Selection
The Ethernet Controller can be clocked from an on-chip crystal oscillator which can also be driven
by an external oscillator. When using the on-chip crystal oscillator, a 25-MHz crystal should be
connected between the XTALPPHY and XTALNPHY pins. Alternatively, an external 25-MHz clock
input can be connected to the XTALPPHY pin. In this mode of operation, a crystal is not required
and the XTALNPHY pin should be left unconnected. The Ethernet oscillator is powered down when
the EPHY0 bit in the Run Mode Clock Gating Control Register 2 (RCGC2) register is clear. After
setting the EPHY0 bit, software must wait 3.5 ms before accessing any of the MII Management
registers. See “Ethernet Controller” on page 787 for more information regarding the specifications
of the Ethernet Controller.
15.3.3.2
Auto-Negotiation
The Ethernet Controller supports the auto-negotiation functions of Clause 28 of the IEEE 802.3
standard for 10/100 Mbps operation over copper wiring. This function is controlled via register
settings. The auto-negotiation function is turned on by default, and the ANEGEN bit in the Ethernet
PHY Management Register 0 - Control (MR0) is set after reset. Software can disable the
auto-negotiation function by clearing the ANEGEN bit. The contents of the Ethernet PHY Management
Register - Auto-Negotiation Advertisement (MR4) are reflected to the Ethernet Controller’s link
partner during auto-negotiation via fast-link pulse coding.
Once auto-negotiation is complete, the SPEED bit in the Ethernet PHY Management Register 31
– PHY Special Control/Status (MR31) register reflects the actual speed. The AUTODONE bit in
MR31 is set to indicate that auto-negotiation is complete. Setting the RANEG bit in the MR0 register
also causes auto-negotiation to restart.
15.3.3.3
Polarity Correction
The Ethernet Controller is capable of automatic polarity reversal for 10BASE-T and auto-negotiation
functions. The XPOL bit in the Ethernet PHY Management Register 27 –Special Control/Status
(MR27) register is set to indicate the polarity has automatically been reversed.
15.3.3.4
MDI/MDI-X Configuration
The Ethernet Controller supports the MDI/MDI-X configuration as defined in IEEE 802.3-2002
specification through software assistance. The MDI/MDI-X configuration eliminates the need for
cross-over cables when connecting to another device, such as a hub. Software can implement the
MDI/MDI-X configuration using a function outlined by the pseudo code below. This code should be
called periodically using one of the available timer resources on the Stellaris microcontroller such
as the System Tick Timer or one of the General Purpose timers. The following code refers to the
LINK bit in the Ethernet PHY Management Register 1 - Status (MR1), the ENON bit in the Ethernet
PHY Management Register 17 - Mode Control/Status (MR17), and the EN bit of the Ethernet
PHY MDIX (MDIX) register.
//
// Entry Point for MDI/MDI-X configuration.
//
//
// Increment the Link Active and Energy Detect Timers using the elapsed time
// since the last call to this function. If using a periodic timer, the
// elapsed time should be a constant (the programmed period of the timer).
//
Increment Link Active Timer
July 24, 2012
665
Texas Instruments-Production Data