LM3S6G11 Datasheet, PDF (742/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

Signal Tables
OBSOLETE: TI has discontinued production of this device.
Table 18-3. Signals by Signal Name (continued)
Pin Name
PG0
PG1
RST
RXIN
RXIP
SSI0Clk
SSI0Fss
SSI0Rx
SSI0Tx
SSI1Clk
SSI1Fss
SSI1Rx
SSI1Tx
SWCLK
SWDIO
SWO
TCK
TDI
TDO
TMS
TXON
TXOP
U0Rx
Pin Number Pin Mux / Pin
Assignment
19
-
18
-
64
fixed
37
fixed
40
fixed
28
PA2 (1)
29
PA3 (1)
30
PA4 (1)
31
PA5 (1)
60
PF2 (9)
72
PE0 (2)
59
PF3 (9)
73
PE1 (2)
74
PE2 (2)
75
PE3 (2)
80
PC0 (3)
79
PC1 (3)
77
PC3 (3)
80
PC0 (3)
78
PC2 (3)
77
PC3 (3)
79
PC1 (3)
46
fixed
43
fixed
26
PA0 (1)
Pin Type
I/O
I/O
I
I
I
I/O
I/O
I
O
I/O
I/O
I
O
I
I/O
O
I
I
O
I
O
O
I
U0Tx
27
PA1 (1)
O
U1DSR
47
PF0 (9)
I
U1Rx
U1Tx
U2Rx
10
PD0 (5)
I
12
PD2 (1)
23
PC6 (5)
26
PA0 (9)
66
PB0 (5)
92
PB4 (7)
11
PD1 (5)
O
13
PD3 (1)
22
PC7 (5)
27
PA1 (9)
67
PB1 (5)
91
PB5 (7)
10
PD0 (4)
I
19
PG0 (1)
92
PB4 (4)
96
PD5 (9)
Buffer Type^a Description
TTL
TTL
TTL
Analog
Analog
TTL
TTL
TTL
TTL
TTL
GPIO port G bit 0.
GPIO port G bit 1.
System reset input.
RXIN of the Ethernet PHY.
RXIP of the Ethernet PHY.
SSI module 0 clock
SSI module 0 frame signal
SSI module 0 receive
SSI module 0 transmit
SSI module 1 clock
TTL
SSI module 1 frame signal
TTL
SSI module 1 receive
TTL
SSI module 1 transmit
TTL
JTAG/SWD CLK.
TTL
JTAG TMS and SWDIO.
TTL
JTAG TDO and SWO.
TTL
JTAG/SWD CLK.
TTL
JTAG TDI.
TTL
JTAG TDO and SWO.
TTL
JTAG TMS and SWDIO.
TTL
TXON of the Ethernet PHY.
TTL
TXOP of the Ethernet PHY.
TTL
UART module 0 receive. When in IrDA mode, this
signal has IrDA modulation.
TTL
UART module 0 transmit. When in IrDA mode, this
signal has IrDA modulation.
TTL
UART module 1 Data Set Ready modem output
control line.
TTL
UART module 1 receive. When in IrDA mode, this
signal has IrDA modulation.
TTL
UART module 1 transmit. When in IrDA mode, this
signal has IrDA modulation.
TTL
UART module 2 receive. When in IrDA mode, this
signal has IrDA modulation.
742
July 24, 2012
Texas Instruments-Production Data