LM3S6G11 Datasheet, PDF (655/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6G11 Microcontroller
Register 14: I²C Slave Raw Interrupt Status (I2CSRIS), offset 0x810
This register specifies whether an interrupt is pending.
I2C Slave Raw Interrupt Status (I2CSRIS)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
Offset 0x810
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
STOPRIS STARTRIS DATARIS
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:3
2
1
0
Name
reserved
STOPRIS
STARTRIS
DATARIS
Type
RO
RO
RO
RO
Reset
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Stop Condition Raw Interrupt Status
Value Description
1 A STOP condition interrupt is pending.
0 No interrupt.
This bit is cleared by writing a 1 to the STOPIC bit in the I2CSICR
register.
Start Condition Raw Interrupt Status
Value Description
1 A START condition interrupt is pending.
0 No interrupt.
This bit is cleared by writing a 1 to the STARTIC bit in the I2CSICR
register.
Data Raw Interrupt Status
Value Description
1 A data received or data requested interrupt is pending.
0 No interrupt.
This bit is cleared by writing a 1 to the DATAIC bit in the I2CSICR
register.
July 24, 2012
655
Texas Instruments-Production Data