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LM3S6G11 Datasheet, PDF (194/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller
System Control
OBSOLETE: TI has discontinued production of this device.
Register 5: Masked Interrupt Status and Clear (MISC), offset 0x058
On a read, this register gives the current masked status value of the corresponding interrupt in the
Raw Interrupt Status (RIS) register. All of the bits are R/W1C, thus writing a 1 to a bit clears the
corresponding raw interrupt bit in the RIS register (see page 190).
Masked Interrupt Status and Clear (MISC)
Base 0x400F.E000
Offset 0x058
Type R/W1C, reset 0x0000.0000
31
30
29
28
27
26
Type RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
15
14
13
12
11
10
reserved
Type RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
25
24
23
22
21
reserved
RO
RO
RO
RO
RO
0
0
0
0
0
9
8
7
6
5
MOSCPUPMIS reserved PLLLMIS
RO R/W1C RO R/W1C RO
0
0
0
0
0
20
19
RO
RO
0
0
4
3
reserved
RO
RO
0
0
18
17
16
RO
RO
RO
0
0
0
2
1
0
BORMIS reserved
RO R/W1C RO
0
0
0
Bit/Field
31:9
8
Name
reserved
MOSCPUPMIS
Type
Reset Description
RO 0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
R/W1C
0
MOSC Power Up Masked Interrupt Status
Value Description
1 When read, a 1 indicates that an unmasked interrupt was
signaled because sufficient time has passed for the MOSC PLL
to lock.
Writing a 1 to this bit clears it and also the MOSCPUPRIS bit in
the RIS register.
0 When read, a 0 indicates that sufficient time has not passed for
the MOSC PLL to lock.
A write of 0 has no effect on the state of this bit.
7
reserved
RO
0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
6
PLLLMIS
R/W1C
0
PLL Lock Masked Interrupt Status
Value Description
1 When read, a 1 indicates that an unmasked interrupt was
signaled because sufficient time has passed for the PLL to lock.
Writing a 1 to this bit clears it and also the PLLLRIS bit in the
RIS register.
0 When read, a 0 indicates that sufficient time has not passed for
the PLL to lock.
A write of 0 has no effect on the state of this bit.
194
July 24, 2012
Texas Instruments-Production Data