LM3S6G11 Datasheet, PDF (14/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

Table of Contents
OBSOLETE: TI has discontinued production of this device.
Table 8-3.
Table 8-4.
Table 8-5.
Table 8-6.
Table 8-7.
Table 8-8.
Table 8-9.
Table 8-10.
Table 8-11.
Table 8-12.
Table 8-13.
Table 9-1.
Table 9-2.
Table 9-3.
Table 9-4.
Table 9-5.
Table 9-6.
Table 9-7.
Table 9-8.
Table 9-9.
Table 9-10.
Table 9-11.
Table 9-12.
Table 10-1.
Table 10-2.
Table 10-3.
Table 10-4.
Table 10-5.
Table 10-6.
Table 10-7.
Table 10-8.
Table 10-9.
Table 10-10.
Table 10-11.
Table 11-1.
Table 12-1.
Table 12-2.
Table 12-3.
Table 12-4.
Table 13-1.
Table 13-2.
Table 13-3.
Table 14-1.
Table 14-2.
Table 14-3.
Table 14-4.
Table 14-5.
Control Structure Memory Map ........................................................................... 336
Channel Control Structure .................................................................................. 336
μDMA Read Example: 8-Bit Peripheral ................................................................ 345
μDMA Interrupt Assignments .............................................................................. 346
Channel Control Structure Offsets for Channel 30 ................................................ 347
Channel Control Word Configuration for Memory Transfer Example ...................... 347
Channel Control Structure Offsets for Channel 7 .................................................. 348
Channel Control Word Configuration for Peripheral Transmit Example .................. 349
Primary and Alternate Channel Control Structure Offsets for Channel 8 ................. 350
Channel Control Word Configuration for Peripheral Ping-Pong Receive
Example ............................................................................................................ 351
μDMA Register Map .......................................................................................... 353
GPIO Pins With Non-Zero Reset Values .............................................................. 392
GPIO Pins and Alternate Functions (100LQFP) ................................................... 392
GPIO Pins and Alternate Functions (108BGA) ..................................................... 393
GPIO Pad Configuration Examples ..................................................................... 399
GPIO Interrupt Configuration Example ................................................................ 399
GPIO Pins With Non-Zero Reset Values .............................................................. 401
GPIO Register Map ........................................................................................... 401
GPIO Pins With Non-Zero Reset Values .............................................................. 412
GPIO Pins With Non-Zero Reset Values .............................................................. 418
GPIO Pins With Non-Zero Reset Values .............................................................. 420
GPIO Pins With Non-Zero Reset Values .............................................................. 423
GPIO Pins With Non-Zero Reset Values .............................................................. 429
Available CCP Pins ............................................................................................ 444
General-Purpose Timers Signals (100LQFP) ....................................................... 445
General-Purpose Timers Signals (108BGA) ......................................................... 446
General-Purpose Timer Capabilities .................................................................... 447
Counter Values When the Timer is Enabled in Periodic or One-Shot Modes .......... 448
16-Bit Timer With Prescaler Configurations ......................................................... 449
Counter Values When the Timer is Enabled in RTC Mode .................................... 450
Counter Values When the Timer is Enabled in Input Edge-Count Mode ................. 450
Counter Values When the Timer is Enabled in Input Event-Count Mode ................ 452
Counter Values When the Timer is Enabled in PWM Mode ................................... 453
Timers Register Map .......................................................................................... 458
Watchdog Timers Register Map .......................................................................... 493
UART Signals (100LQFP) .................................................................................. 517
UART Signals (108BGA) .................................................................................... 517
Flow Control Mode ............................................................................................. 522
UART Register Map ........................................................................................... 527
SSI Signals (100LQFP) ...................................................................................... 580
SSI Signals (108BGA) ........................................................................................ 580
SSI Register Map .............................................................................................. 591
I2C Signals (100LQFP) ...................................................................................... 621
I2C Signals (108BGA) ........................................................................................ 621
Examples of I²C Master Timer Period versus Speed Mode ................................... 625
Inter-Integrated Circuit (I²C) Interface Register Map ............................................. 635
Write Field Decoding for I2CMCS[3:0] Field ......................................................... 641
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July 24, 2012
Texas Instruments-Production Data