LM3S6G11 Datasheet, PDF (763/827 Pages) Texas Instruments – Stellaris® LM3S6G11 Microcontroller

OBSOLETE: TI has discontinued production of this device.
Stellaris^® LM3S6G11 Microcontroller
Table 18-8. Signals by Signal Name (continued)
Pin Name
Pin Number Pin Mux / Pin Pin Type Buffer Type^a Description
Assignment
U2Rx
G1
PD0 (4)
I
K1
PG0 (1)
A6
PB4 (4)
B4
PD5 (9)
TTL
UART module 2 receive. When in IrDA mode, this
signal has IrDA modulation.
U2Tx
B2
PE4 (5)
O
G2
PD1 (4)
K2
PG1 (1)
A3
PD6 (9)
TTL
UART module 2 transmit. When in IrDA mode, this
signal has IrDA modulation.
VBAT
L12
fixed
-
Power Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
VDD
K7
fixed
-
Power Positive supply for I/O and some logic.
G12
K8
C10
K9
H10
G10
E10
D10
D11
G11
VDDA
C7
fixed
C6
-
Power The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 20-2 on page 774 , regardless
of system implementation.
VDDC
F3
fixed
D3
G3
C3
-
Power Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 20-6 on page 779 .
WAKE
M10
fixed
I
TTL
An external input that brings the processor out of
Hibernate mode when asserted.
XOSC0
K11
fixed
I
Analog Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
XOSC1
K12
fixed
O
Analog Hibernation module oscillator crystal output. Leave
unconnected when using a single-ended clock
source.
XTALNPHY
J1
fixed
O
Analog Ethernet PHY XTALN 25-MHz oscillator crystal
output. Leave this pin unconnected when using a
single-ended 25-MHz clock input connected to the
XTALPPHY pin.
XTALPPHY
J2
fixed
I
Analog Ethernet PHY XTALP 25-MHz oscillator crystal
input or external clock reference input.
a. The TTL designation indicates the pin has TTL-compatible voltage levels.
July 24, 2012
763
Texas Instruments-Production Data