LM3S5C36 Datasheet, PDF (955/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller

Stellaris^® LM3S5C36 Microcontroller
Bit/Field
2
1
0
Name
DCMP2
DCMP1
DCMP0
Type
-
-
-
Reset
0
Description
Digital Comparator 2 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 2 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP2 is set, the trigger transitioned to the active state previously.
■ If DCMP2 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP2 bit is cleared by writing it with the value 1.
0
Digital Comparator 1 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 1 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP1 is set, the trigger transitioned to the active state previously.
■ If DCMP1 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP1 bit is cleared by writing it with the value 1.
0
Digital Comparator 0 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 0 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP0 is set, the trigger transitioned to the active state previously.
■ If DCMP0 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP0 bit is cleared by writing it with the value 1.
January 23, 2012
955
Texas Instruments-Production Data