LM3S5C36 Datasheet, PDF (402/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller

Micro Direct Memory Access (μDMA)
Register 22: DMA Channel Interrupt Status (DMACHIS), offset 0x504
Each bit of the DMACHIS register represents the corresponding µDMA channel. A bit is set when
that μDMA channel causes a completion interrupt. The bits are cleared by a writing a 1.
DMA Channel Interrupt Status (DMACHIS)
Base 0x400F.F000
Offset 0x504
Type R/W1C, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CHIS[n]
Type R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CHIS[n]
Type R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C R/W1C
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:0
Name
CHIS[n]
Type
Reset Description
R/W1C 0x0000.0000 Channel [n] Interrupt Status
Value Description
1 The corresponding μDMA channel caused an interrupt.
0 The corresponding μDMA channel has not caused an interrupt.
This bit is cleared by writing a 1 to it.
402
January 23, 2012
Texas Instruments-Production Data