LM3S5C36 Datasheet, PDF (483/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller

Stellaris^® LM3S5C36 Microcontroller
Bit/Field
5
4
3
2
1:0
Name
TBMIE
TBCDIR
TBAMS
TBCMR
TBMR
Type
R/W
Reset
0
Description
GPTM Timer B Match Interrupt Enable
Value Description
0 The match interrupt is disabled.
1 An interrupt is generated when the match value in the
GPTMTBMATCHR register is reached in the one-shot and
periodic modes.
R/W
0
GPTM Timer B Count Direction
Value Description
0 The timer counts down.
1 When in one-shot or periodic mode, the timer counts up. When
counting up, the timer starts from a value of 0x0.
When in PWM or RTC mode, the status of this bit is ignored. PWM mode
always counts down and RTC mode always counts up.
R/W
0
GPTM Timer B Alternate Mode Select
The TBAMS values are defined as follows:
Value Description
0 Capture mode is enabled.
1 PWM mode is enabled.
Note: To enable PWM mode, you must also clear the TBCMR
bit and configure the TBMR field to 0x1 or 0x2.
R/W
0
GPTM Timer B Capture Mode
The TBCMR values are defined as follows:
Value Description
0 Edge-Count mode
1 Edge-Time mode
R/W
0x0
GPTM Timer B Mode
The TBMR values are defined as follows:
Value Description
0x0 Reserved
0x1 One-Shot Timer mode
0x2 Periodic Timer mode
0x3 Capture mode
The timer mode is based on the timer configuration defined by bits 2:0
in the GPTMCFG register.
January 23, 2012
483
Texas Instruments-Production Data