LM3S5C36 Datasheet, PDF (925/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller

Stellaris^® LM3S5C36 Microcontroller
Bit/Field
12
11
10
9
8
7:6
5
Name
TRCMPBU
TRCMPAD
TRCMPAU
TRCNTLOAD
TRCNTZERO
reserved
INTCMPBD
Type
R/W
R/W
R/W
R/W
R/W
RO
R/W
Reset
0
Description
Trigger for Counter=PWMnCMPB Up
Value Description
1 An ADC trigger pulse is output when the counter matches the
value in the PWMnCMPB register value while counting up.
0 No ADC trigger is output.
0
Trigger for Counter=PWMnCMPA Down
Value Description
1 An ADC trigger pulse is output when the counter matches the
value in the PWMnCMPA register value while counting down.
0 No ADC trigger is output.
0
Trigger for Counter=PWMnCMPA Up
Value Description
1 An ADC trigger pulse is output when the counter matches the
value in the PWMnCMPA register value while counting up.
0 No ADC trigger is output.
0
Trigger for Counter=PWMnLOAD
Value Description
1 An ADC trigger pulse is output when the counter matches the
PWMnLOAD register.
0 No ADC trigger is output.
0
Trigger for Counter=0
Value Description
1 An ADC trigger pulse is output when the counter is 0.
0 No ADC trigger is output.
0x0
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
Interrupt for Counter=PWMnCMPB Down
Value Description
1 A raw interrupt occurs when the counter matches the value in
the PWMnCMPB register value while counting down.
0 No interrupt.
January 23, 2012
925
Texas Instruments-Production Data