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LM3S5C36 Datasheet, PDF (46/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller | |||
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Architectural Overview
1.3.3.3
â 15 configurable IN endpoints and 15 configurable OUT endpoints
â 4 KB dedicated endpoint memory: one endpoint may be defined for double-buffered 1023-byte
isochronous packet size
â Efficient transfers using Micro Direct Memory Access Controller (µDMA)
â Separate channels for transmit and receive for up to three IN endpoints and three OUT
endpoints
â Channel requests asserted when FIFO contains required amount of data
UART (see page 614)
A Universal Asynchronous Receiver/Transmitter (UART) is an integrated circuit used for RS-232C
serial communications, containing a transmitter (parallel-to-serial converter) and a receiver
(serial-to-parallel converter), each clocked separately.
The LM3S5C36 microcontroller includes three fully programmable 16C550-type UARTs. Although
the functionality is similar to a 16C550 UART, this UART design is not register compatible. The
UART can generate individually masked interrupts from the Rx, Tx, and error conditions. The module
generates a single combined interrupt when any of the interrupts are asserted and are unmasked.
The three UARTs have the following features:
â Programmable baud-rate generator allowing speeds up to 5 Mbps for regular speed (divide by
16) and 10 Mbps for high speed (divide by 8)
â Separate 16x8 transmit (TX) and receive (RX) FIFOs to reduce CPU interrupt service loading
â Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
â FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
â Standard asynchronous communication bits for start, stop, and parity
â Line-break generation and detection
â Fully programmable serial interface characteristics
â 5, 6, 7, or 8 data bits
â Even, odd, stick, or no-parity bit generation/detection
â 1 or 2 stop bit generation
â IrDA serial-IR (SIR) encoder/decoder providing
â Programmable use of IrDA Serial Infrared (SIR) or UART input/output
â Support of IrDA SIR encoder/decoder functions for data rates up to 115.2 Kbps half-duplex
â Support of normal 3/16 and low-power (1.41-2.23 μs) bit durations
â Programmable internal clock generator enabling division of reference clock by 1 to 256 for
low-power mode bit duration
46
January 23, 2012
Texas Instruments-Production Data
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