LM3S5C36 Datasheet, PDF (30/1068 Pages) Texas Instruments – Stellaris® LM3S5C36 Microcontroller

Table of Contents
Register 139: USB Receive Byte Count Endpoint 12 (USBRXCOUNT12), offset 0x1C8 .......................... 857
Register 140: USB Receive Byte Count Endpoint 13 (USBRXCOUNT13), offset 0x1D8 .......................... 857
Register 141: USB Receive Byte Count Endpoint 14 (USBRXCOUNT14), offset 0x1E8 .......................... 857
Register 142: USB Receive Byte Count Endpoint 15 (USBRXCOUNT15), offset 0x1F8 .......................... 857
Register 143: USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS), offset 0x340 ............. 859
Register 144: USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS), offset 0x342 ............ 861
Register 145: USB Device RESUME Raw Interrupt Status (USBDRRIS), offset 0x410 ............................ 863
Register 146: USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414 ....................................... 864
Register 147: USB Device RESUME Interrupt Status and Clear (USBDRISC), offset 0x418 .................... 865
Register 148: USB DMA Select (USBDMASEL), offset 0x450 ................................................................ 866
Analog Comparators ................................................................................................................... 868
Register 1: Analog Comparator Masked Interrupt Status (ACMIS), offset 0x000 .................................. 873
Register 2: Analog Comparator Raw Interrupt Status (ACRIS), offset 0x004 ....................................... 874
Register 3: Analog Comparator Interrupt Enable (ACINTEN), offset 0x008 ......................................... 875
Register 4: Analog Comparator Reference Voltage Control (ACREFCTL), offset 0x010 ....................... 876
Register 5: Analog Comparator Status 0 (ACSTAT0), offset 0x020 ..................................................... 877
Register 6: Analog Comparator Status 1 (ACSTAT1), offset 0x040 ..................................................... 877
Register 7: Analog Comparator Control 0 (ACCTL0), offset 0x024 ..................................................... 878
Register 8: Analog Comparator Control 1 (ACCTL1), offset 0x044 ..................................................... 878
Pulse Width Modulator (PWM) .................................................................................................... 880
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 894
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 896
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 897
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 899
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 901
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 903
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 905
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 908
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 911
Register 10: PWM Fault Condition Value (PWMFAULTVAL), offset 0x024 ............................................ 913
Register 11: PWM Enable Update (PWMENUPD), offset 0x028 ........................................................... 915
Register 12: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 919
Register 13: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 919
Register 14: PWM2 Control (PWM2CTL), offset 0x0C0 ....................................................................... 919
Register 15: PWM3 Control (PWM3CTL), offset 0x100 ....................................................................... 919
Register 16: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 ..................................... 924
Register 17: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 ..................................... 924
Register 18: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 .................................... 924
Register 19: PWM3 Interrupt and Trigger Enable (PWM3INTEN), offset 0x104 ..................................... 924
Register 20: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 ..................................................... 927
Register 21: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 ..................................................... 927
Register 22: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 .................................................... 927
Register 23: PWM3 Raw Interrupt Status (PWM3RIS), offset 0x108 ..................................................... 927
Register 24: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ............................................ 929
Register 25: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ............................................ 929
Register 26: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ............................................ 929
Register 27: PWM3 Interrupt Status and Clear (PWM3ISC), offset 0x10C ............................................ 929
Register 28: PWM0 Load (PWM0LOAD), offset 0x050 ........................................................................ 931
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January 23, 2012
Texas Instruments-Production Data