TLK110 Datasheet, PDF (9/104 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer

TLK110
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SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
3.1 Bootstrap Configuration
Bootstrap configuration is a convenient way to configure the TLK110 into specific modes of operation.
Some of the functional pins are used as configuration inputs. The logic states of these pins are sampled
during reset and are used to configure the device into specific modes of operation. The table below
describes bootstrap configuration.
A 2.2kΩ resistor is used for pull-down or pull-up to change the default configuration. If the default option is
desired, then there is no need for external pull-up or pull down resistors. Because these pins may have
alternate functions after reset is deasserted, they must not be connected directly to VCC or GND.
PIN
NAME
PHYAD0 (COL)
PHYAD1 (RXD_0)
PHYAD2 (RXD_1)
PHYAD3 (RXD_2)
PHYAD4 (RXD_3)
SW_STRAPN
AN_EN (LED_ACT)
AN_1 (LED_SPEED)
AN_0 (LED_LINK)
LED_CFG (CRS)
MDIX_EN (RX_ER)
MII_MODE (RX_DV)
TYPE
NO.
DESCRIPTION
42
PHY Address [4:0]: The TLK110 provides five PHY address pins, the states of which are
43
latched into an internal register at system hardware reset. The TLK110 supports PHY
44 S, O, PD Address values 0 (<00000>) through 31 (<11111>). PHYAD[4:1] pins have weak internal
45
pull-down resistors, and PHYAD[0] has weak internal pull-up resistor, setting the default
46
PHYAD if no external resistors are connected.
Software Strapping Mode: The TLK110 provides a mechanism to extend the number of
configuration pins to allow wider system programmability of PHY functions. An external
pull-down will cause the device to enter SW Strapping Mode. In this mode the device will
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I
wake up after Power-up/Reset in Power-Down mode, this will allow the system processor
to access dedicated Strapping Registers and configure modes of operation. An access to
SW Strapping Mode Release register must be done to take the device out of power-down
mode. See Section 3.8 for more details. An external pull-up resistor should be used to
disable Software Strapping Mode.
AN_EN: When high, this puts the part into advertised Auto-Negotiation mode with the
capability set by AN_0 and AN_1 pins. When low, this puts the part into Forced Mode with
the capability set by AN_0 and AN_1 pins.
AN_0 / AN_1: These input pins control the forced or advertised operating mode of the
TLK110 according to the following table. The value on these pins is set by connecting the
input pins to GND (0) or VCC (1) through 2.2 kΩ resistors. DO NOT connect these pins
directly to GND or VCC.
The status of these pins are latched into the Basic Mode Control Register and the
Auto_Negotiation Advertisement Register during Hardware-Reset.
The default is 111 since these pins have internal pull-ups.
26
27 S, O, PU
28
AN_EN
0
0
0
0
AN_EN
1
1
1
1
AN_1
0
0
1
1
AN_1
0
0
1
1
AN_0
0
1
0
1
AN_0
0
1
0
1
Forced Mode
10Base-T, Half-Duplex
10Base-T, Full-Duplex
100Base-TX, Half-Duplex
100Base-TX, Full-Duplex
Advertised Mode
10Base-T, Half/Full-Duplex
100Base-TX, Half/Full-Duplex
10Base-T, Half-Duplex
100Base-TX, Half-Duplex
10Base-T, Half/Full-Duplex
100Base-TX, Half/Full-Duplex
This option, along with the LEDCR register bit, selects the mode of operation of the LED
40 S, O, PU pins. Default is Mode 1. All modes are also configurable via register access. See the table
in the LED Interface Section.
41
S, O, PU
This option sets the Auto-MDIX mode. By default, it enables MDIX. An external pull-down
disables Auto-MDIX mode.
MII Mode Select: This option selects the operating mode of the MAC data interface. This
39 S, O, PD pin has a weak internal pull-down, and it defaults to normal MII operation mode. An
external pull-up causes the device to operate in RMII mode.
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Hardware Configuration
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