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TLK110 Datasheet, PDF (69/104 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer
TLK110
www.ti.com
SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
Table 8-24. BIST Control Register (BISCR), address 0x0016 (continued)
BIT NAME
5 RESERVED
4:0 Loopback Mode
DEFAULT
0, RO
0, RW
DESCRIPTION
RESERVED: Must be 0
Loop-back Mode Select:
The PHY provides several options for Loopback that test and verify various functional
blocks within the PHY. Enabling loopback mode allows in-circuit testing of the TLK110
digital and analog data path
Near-end Loopbacks
[00001] – PCS Input Loopback
[00010] – PCS Output Loopback (In 100Base-TX only)
[00100] – Digital Loopback
[01000] – Analog Loopback (requires 100Ω termination)
Far-end Loopback:
[10000] – Reverse Loopback
8.3.8 RMII Control and Status Register (RCSR)
This register configures the RMII Mode of operation. When RMII mode is disabled, the RMII functionality is
bypassed.
Table 8-25. RMII Control and Status Register (RCSR), address 0x0017
BIT NAME
15:6 RESERVED
5 RMII Mode
4 RMII Revision
Select
3 RMII OVFL Status
2 RMII OVFL Status
1:0 ELAST_FUB
DEFAULT
<0000 0000
00>0,RO
0,RW, Strap
0,RW
0,COR
0,COR
<01>,RW
DESCRIPTION
RESERVED: Writes ignored, read as 0.
RMII Mode Enable:
1 = Enable RMII (Reduced MII) mode of operation
0 = Enable MII mode of operation
RMII Revision Select:
1 = (RMII revision 1.0) CRS_DV will remain asserted until final data is transferred.
CRS_DV will not toggle at the end of a packet.
0 = (RMII revision 1.2) CRS_DV will toggle at the end of a packet to indicate de-
assertion of CRS.
RX FIFO Over Flow Status:
1 = Normal
0 = Overflow detected
RX FIFO Under Flow Status:
1 = Normal
0 = Underflow detected
Receive Elasticity Buffer Size:
This field controls the Receive Elasticity Buffer which allows for frequency variation
tolerance between the 50MHz RMII clock and the recovered data. The following values
indicate the tolerance in bits for a single packet. The minimum setting allows for
standard Ethernet frame sizes at ±50ppm accuracy for both RMII and Receive clocks.
For greater frequency tolerance the packet lengths may be scaled (i.e. for ±100ppm,
the packet lengths need to be divided by 2).
<00> = 14 bit tolerance (up to 16800 byte packets)
<01> = 2 bit tolerance (up to 2400 byte packets)
<10> = 6 bit tolerance (up to 7200 byte packets)
<11> = 10 bit tolerance (up to 12000 byte packets)
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