TLK110 Datasheet, PDF (87/104 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer

TLK110
www.ti.com
SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
9.6.8 100Base-TX Transmit Timing (t_R/F and Jitter)
Table 9-8. 100Base-TX Transmit Timing (t_R/F and Jitter)
PARAMETER
t₁
100Mbs PMD Output Pair t_R and t_F ⁽¹⁾
100Mbs t_R and t_F Mismatch⁽²⁾
t₂
100Mbs PMD Output Pair Transmit Jitter
TEST CONDITIONS
MIN TYP
3
4
(1) Rise and fall times taken at 10% and 90% of the +1 or -1 amplitude.
(2) Normal Mismatch is the difference between the maximum and minimum of all rise and fall times.
MAX
5
500
1.4
UNIT
ns
ps
ns
t₁
+1 rise
90%
PMD Output Pair
10%
10%
+1 fall
t₁
90%
–1 fall
t₁
–1 rise
t₁
t₂
PMD Output Pair
Eye Pattern
t₂
Figure 9-8. 100Base-TX Transmit Timing (t_R/F and Jitter)
T0345-01
Copyright © 2011–2012, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Link(s): TLK110
Electrical Specifications
87