TLK110 Datasheet, PDF (62/104 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer

TLK110
SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
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8.2 Extended Register Addressing
REGCR (0x000D) and ADDAR (0x000E) allow read/write access to the extended register set using
indirect addressing.
• REGCR [15:14] = 00: A write to ADDAR modifies the extended register set address register. This
address register must be initialized in order to access any of the registers within the extended register
set.
• REGCR [15:14] = 01: A read/write to ADDAR operates on the register within the extended register set
selected (pointed to) by the value in the address register. The address register contents (pointer)
remain unchanged.
• REGCR [15:14] = 10: A read/write to ADDAR operates on the register within the extended register set
selected (pointed to) by the value in the address register. After that access is complete, for both reads
and writes, the value in the address register is incremented.
• REGCR [15:14] = 11: A read/write to ADDAR operates on the register within the extended register set
selected (pointed to) by the value in the address register. After that access is complete, for write
accesses only, the value in the address register is incremented. For read accesses, the value of the
address register remains unchanged.
8.2.1 Register Control Register (REGCR)
This register is the MDIO Manageable MMD access control. In general, register REGCR (4:0) is the
device address DEVAD that directs any accesses of ADDAR (0x000E) register to the appropriate MMD. It
also contains selection bits for auto increment of the data register. This register contains the device
address to be written to access the extended registers. Write 0x1F into bits 4:0 of this register. It also
contains selection bits (15:14) for the address auto-increment mode of ADDAR.
BIT BIT NAME
15:1 Function
4
13:5 RESERVED
4:0 DEVAD
Table 8-16. Register Control Register (REGCR), address 0x000D
DEFAULT
0, RW
0, RO
0, RW
DESCRIPTION
00 = Address
01 = Data, no post increment
10 = Data, post increment on read and write
11 = Data, post increment on write only
RESERVED: Writes ignored, read as 0.
Device Address: In general, these bits [4:0] are the device address DEVAD that directs any
accesses of ADDAR register (0x000E) to the appropriate MMD. Specifically, the TLK110 uses
the vendor specific DEVAD [4:0] = “11111” for accesses. All accesses through registers REGCR
and ADDAR should use this DEVAD. Transactions with other DEVAD are ignored.
8.2.2 Address or Data Register (ADDAR)
This register is the address/data MMD register. It is used in conjunction with REGCR register (0x000D) to
provide the access by indirect read/write mechanism to the extended register set.
BIT BIT NAME
15:0 Addr/data
Table 8-17. Data Register (ADDAR), address 0x000E
DEFAULT
0, RW
DESCRIPTION
If REGCR register 15:14 = 00, holds the MMD DEVAD's address register, otherwise holds the
MMD DEVAD's data register
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