TLK110 Datasheet, PDF (4/104 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer

TLK110
SLLS901A – DECEMBER 2011 – REVISED FEBRUARY 2012
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2 Pin Descriptions
The TLK110 pins are classified into the following interface categories (each interface is described in the
sections that follow):
• Serial Management Interface
• MAC Data Interface
• Clock Interface
• LED Interface
• JTAG Interface
• Reset and Power Down
• Bootstrap Configuration Inputs
• 10/100Mbs PMD Interface
• Special Connect Pins
• Power and Ground pins
Note: Configuration pin option. See Section 3.1 for Jumper Definitions.
The definitions below define the functionality of each pin.
Type: I
Type: O
Type: I/O
Type: OD
Type: PD, PU
Type: S
Input
Output
Input/Output
Open Drain
Internal Pulldown/Pullup
Configuration Pin (All configuration pins have weak internal pullups or pulldowns. If
a different default value is needed, then use an external 2.2kΩ resistor. See
Section 3.1 for details.)
2.1 Pin Layout
36 35 34 33 32 31 30 29 28 27 26 25
PFBIN2 3 7
2 4 _RBIAS
RX_CLK 3 8
2 3 _PFBOUT
RX_DV/MII_MODE ^{3 9}
2 2 _AVDD33
CRS/CRS_DV/LED_CFG 4 0
2 1 _{SW_STRAPN}
RX_ER/MDIX_EN 4 1
2 0 _RESERVED
COL/PHYAD0 ^{4 2}
RXD_0/PHYAD 1 4 3
TLK110
1 9 AGND
1 8 _PFBIN1
RXD_1/PHYAD2 4 4
1 7 TD+
RXD_2/PHYAD 3 4 5
1 6 _TD-
RXD_3/PHYAD 4 4 6
1 5 _AGND
IOGND 4 7
1 4 _RD+
VDD33_IO 4 8
1 3 _RD-
1
2
3
4
5
6
7
8
9 1 0 11 1 2
4
Pin Descriptions
Figure 2-1. TLK110 PIN DIAGRAM, TOP VIEW
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