LM3S1N16 Datasheet, PDF (736/794 Pages) Texas Instruments – Stellaris® LM3S1N16 Microcontroller

Signal Tables
Table 18-3. Signals by Signal Name (continued)
Pin Name
U1Rx
U1Tx
U2Rx
U2Tx
VBAT
Pin Number Pin Mux / Pin
Assignment
15
PC6 (5)
17
PA0 (9)
41
PB0 (5)
58
PB4 (7)
61
PD0 (5)
63
PD2 (1)
16
PC7 (5)
18
PA1 (9)
42
PB1 (5)
57
PB5 (7)
62
PD1 (5)
64
PD3 (1)
58
PB4 (4)
61
PD0 (4)
8
PE4 (5)
62
PD1 (4)
37
fixed
Pin Type
I
O
I
O
-
VDD
VDDA
12
fixed
-
28
43
59
3
fixed
-
VDDC
VREFA
9
fixed
-
23
38
54
56
PB6
I
WAKE
XOSC0
32
fixed
I
34
fixed
I
Buffer Type^a Description
TTL
UART module 1 receive. When in IrDA mode, this
signal has IrDA modulation.
TTL
UART module 1 transmit. When in IrDA mode, this
signal has IrDA modulation.
TTL
TTL
Power
Power
UART module 2 receive. When in IrDA mode, this
signal has IrDA modulation.
UART module 2 transmit. When in IrDA mode, this
signal has IrDA modulation.
Power source for the Hibernation module. It is
normally connected to the positive terminal of a
battery and serves as the battery
backup/Hibernation module power-source supply.
Positive supply for I/O and some logic.
Power
Power
Analog
TTL
Analog
The positive supply for the analog circuits (ADC,
Analog Comparators, etc.). These are separated
from VDD to minimize the electrical noise contained
on VDD from affecting the analog functions. VDDA
pins must be supplied with a voltage that meets the
specification in Table 20-2 on page 745, regardless
of system implementation.
Positive supply for most of the logic function,
including the processor core and most peripherals.
The voltage on this pin is 1.3 V and is supplied by
the on-chip LDO. The VDDC pins should only be
connected to the LDO pin and an external capacitor
as specified in Table 20-6 on page 750.
This input provides a reference voltage used to
specify the input voltage at which the ADC converts
to a maximum value. In other words, the voltage
that is applied to VREFA is the voltage with which
an AINn signal is converted to 1023. The VREFA
input is limited to the range specified in Table
20-22 on page 757 .
An external input that brings the processor out of
Hibernate mode when asserted.
Hibernation module oscillator crystal input or an
external clock reference input. Note that this is
either a 4.194304-MHz crystal or a 32.768-kHz
oscillator for the Hibernation module RTC. See the
CLKSEL bit in the HIBCTL register.
736
January 21, 2012
Texas Instruments-Production Data