LM3S1N16 Datasheet, PDF (29/794 Pages) Texas Instruments – Stellaris® LM3S1N16 Microcontroller

Stellaris^® LM3S1N16 Microcontroller
Table 1. Revision History (continued)
Date
September 2010
Revision Description
7794
■ Reorganized ARM Cortex-M3 Processor Core, Memory Map and Interrupts chapters, creating two
new chapters, The Cortex-M3 Processor and Cortex-M3 Peripherals. Much additional content was
added, including all the Cortex-M3 registers.
■ Changed register names to be consistent with StellarisWare^® names: the Cortex-M3 Interrupt
Control and Status (ICSR) register to the Interrupt Control and State (INTCTRL) register, and
the Cortex-M3 Interrupt Set Enable (SETNA) register to the Interrupt 0-31 Set Enable (EN0)
register.
■ In the System Control chapter:
– Corrected Reset Sources table (see Table 5-2 on page 174).
– Added section "Special Considerations for Reset."
■ In the Hibernation Module chapter, added section "Special Considerations When Using a
4.194304-MHz Crystal".
■ In the Internal Memory chapter:
– Added clarification of instruction execution during Flash operations.
– Deleted ROM Version (RMVER) register as it is not used.
■ Modified Figure 9-1 on page 388 and Figure 9-2 on page 389 to clarify operation of the GPIO inputs
when used as an alternate function.
■ In General-Purpose Timers chapter, clarified operation of the 32-bit RTC mode.
■ In Operating Characteristics chapter, corrected Thermal resistance (junction to ambient) value to
37.
■ In Electrical Characteristics chapter:
– Added "Input voltage for a GPIO configured as an analog input" value to Table 20-1 on page 745.
– Added I_LKG parameter (GPIO input leakage current) to Table 20-20 on page 755.
– Corrected Nom values for I_{HIB_NORTC} and I_{HIB_RTC} in Table 20-28 on page 760.
– Corrected reset timing in Table 20-5 on page 749.
– Corrected values for t_{WAKE_TO_HIB} in Table 20-18 on page 754.
– Specified Max value for V_REFA in Table 20-22 on page 757.
– Corrected values for t_CLKRF (SSIClk rise/fall time) in Table 20-24 on page 757.
– Added I²C Characteristics table (see Table 20-25 on page 759).
■ Added dimensions for Tray and Tape and Reel shipping mediums.
June 2010
7413 ■ In "Thermal Characteristics" table, added missing thermal resistance value.
June 2010
7299
■ Removed 4.194304-MHz crystal as a source for the system clock and PLL.
■ Summarized ROM contents descriptions in the "Internal Memory" chapter and removed various
ROM appendices.
■ Clarified DMA channel terminology: changed name of DMA Channel Alternate Select (DMACHALT)
register to DMA Channel Assignment (DMACHASGN) register, changed CHALT bit field to CHASGN,
and changed terminology from primary and alternate channels to primary and secondary channels.
■ Changed bits 3:0 to reserved in UARTIM, UARTRIS, UARTMIS, and UARTICR registers. These
bits are only used in devices with the UART Modem Status feature.
■ In Signal Tables chapter, added table "Connections for Unused Signals."
■ In "Electrical Characteristics" chapter:
– In "Reset Characteristics" table, corrected Supply voltage (VDD) rise time.
– Clarified figure "SDRAM Initialization and Load Mode Register Timing".
January 21, 2012
29
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