LM3S1N16 Datasheet, PDF (731/794 Pages) Texas Instruments – Stellaris® LM3S1N16 Microcontroller

Stellaris^® LM3S1N16 Microcontroller
Table 18-2. Signals by Pin Number (continued)
Pin Number
Pin Name
Pin Type Buffer Type^a Description
PB1
I/O
TTL
GPIO port B bit 1. This pin is not 5-V tolerant.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
42
CCP2
I/O
TTL
Capture/Compare/PWM 2.
U1Tx
O
TTL
UART module 1 transmit. When in IrDA mode, this signal has IrDA
modulation.
43
VDD
-
Power Positive supply for I/O and some logic.
44
GND
-
Power Ground reference for logic and I/O pins.
45
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
46
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
PB2
I/O
TTL
GPIO port B bit 2.
CCP0
I/O
TTL
Capture/Compare/PWM 0.
47
CCP3
I/O
TTL
Capture/Compare/PWM 3.
I2C0SCL
I/O
OD
I²C module 0 clock.
48
NC
-
-
No connect. Leave the pin electrically unconnected/isolated.
PC3
I/O
TTL
GPIO port C bit 3.
49
SWO
O
TTL
JTAG TDO and SWO.
TDO
O
TTL
JTAG TDO and SWO.
PC2
I/O
TTL
GPIO port C bit 2.
50
TDI
I
TTL
JTAG TDI.
PC1
I/O
TTL
GPIO port C bit 1.
51
SWDIO
I/O
TTL
JTAG TMS and SWDIO.
TMS
I
TTL
JTAG TMS and SWDIO.
PC0
I/O
TTL
GPIO port C bit 0.
52
SWCLK
I
TTL
JTAG/SWD CLK.
TCK
I
TTL
JTAG/SWD CLK.
53
GND
-
Power Ground reference for logic and I/O pins.
VDDC
54
-
Power Positive supply for most of the logic function, including the
processor core and most peripherals. The voltage on this pin is
1.3 V and is supplied by the on-chip LDO. The VDDC pins should
only be connected to the LDO pin and an external capacitor as
specified in Table 20-6 on page 750.
PB7
I/O
TTL
GPIO port B bit 7.
55
NMI
I
TTL
Non-maskable interrupt.
PB6
I/O
TTL
GPIO port B bit 6.
C0+
I
Analog Analog comparator 0 positive input.
C0o
O
TTL
Analog comparator 0 output.
CCP1
I/O
TTL
Capture/Compare/PWM 1.
56
CCP5
I/O
TTL
Capture/Compare/PWM 5.
VREFA
I
Analog This input provides a reference voltage used to specify the input
voltage at which the ADC converts to a maximum value. In other
words, the voltage that is applied to VREFA is the voltage with which
an AINn signal is converted to 1023. The VREFA input is limited
to the range specified in Table 20-22 on page 757 .
January 21, 2012
731
Texas Instruments-Production Data