LM3S1N16 Datasheet, PDF (52/794 Pages) Texas Instruments – Stellaris® LM3S1N16 Microcontroller

Architectural Overview
1.3.7
1.4
■ Four-bit Instruction Register (IR) chain for storing JTAG instructions
■ IEEE standard instructions: BYPASS, IDCODE, SAMPLE/PRELOAD, EXTEST and INTEST
■ ARM additional instructions: APACC, DPACC and ABORT
■ Integrated ARM Serial Wire Debug (SWD)
– Serial Wire JTAG Debug Port (SWJ-DP)
– Flash Patch and Breakpoint (FPB) unit for implementing breakpoints
– Data Watchpoint and Trace (DWT) unit for implementing watchpoints, trigger resources, and
system profiling
– Instrumentation Trace Macrocell (ITM) for support of printf style debugging
– Trace Port Interface Unit (TPIU) for bridging to a Trace Port Analyzer
Packaging and Temperature
■ Industrial-range (-40°C to 85°C) 64-pin RoHS-compliant LQFP package
Hardware Details
Details on the pins and package can be found in the following sections:
■ “Pin Diagram” on page 726
■ “Signal Tables” on page 727
■ “Operating Characteristics” on page 744
■ “Electrical Characteristics” on page 745
■ “Package Information” on page 789
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January 21, 2012
Texas Instruments-Production Data