LM3S1N16 Datasheet, PDF (10/794 Pages) Texas Instruments – Stellaris® LM3S1N16 Microcontroller

Table of Contents
List of Figures
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Figure 12-6.
Stellaris LM3S1N16 Microcontroller High-Level Block Diagram ............................... 37
CPU Block Diagram ............................................................................................. 55
TPIU Block Diagram ............................................................................................ 56
Cortex-M3 Register Set ........................................................................................ 58
Bit-Band Mapping ................................................................................................ 78
Data Storage ....................................................................................................... 79
Vector Table ........................................................................................................ 85
Exception Stack Frame ........................................................................................ 87
SRD Use Example ............................................................................................. 101
JTAG Module Block Diagram .............................................................................. 162
Test Access Port State Machine ......................................................................... 165
IDCODE Register Format ................................................................................... 171
BYPASS Register Format ................................................................................... 171
Boundary Scan Register Format ......................................................................... 172
Basic RST Configuration .................................................................................... 176
External Circuitry to Extend Power-On Reset ....................................................... 176
Reset Circuit Controlled by Switch ...................................................................... 177
Power Architecture ............................................................................................ 180
Main Clock Tree ................................................................................................ 183
Hibernation Module Block Diagram ..................................................................... 265
Using a Crystal as the Hibernation Clock Source ................................................. 267
Using a Dedicated Oscillator as the Hibernation Clock Source with VDD3ON
Mode ................................................................................................................ 268
Internal Memory Block Diagram .......................................................................... 290
μDMA Block Diagram ......................................................................................... 328
Example of Ping-Pong μDMA Transaction ........................................................... 334
Memory Scatter-Gather, Setup and Configuration ................................................ 336
Memory Scatter-Gather, μDMA Copy Sequence .................................................. 337
Peripheral Scatter-Gather, Setup and Configuration ............................................. 339
Peripheral Scatter-Gather, μDMA Copy Sequence ............................................... 340
Digital I/O Pads ................................................................................................. 388
Analog/Digital I/O Pads ...................................................................................... 389
GPIODATA Write Example ................................................................................. 390
GPIODATA Read Example ................................................................................. 390
GPTM Module Block Diagram ............................................................................ 437
Timer Daisy Chain ............................................................................................. 441
Input Edge-Count Mode Example ....................................................................... 443
16-Bit Input Edge-Time Mode Example ............................................................... 444
16-Bit PWM Mode Example ................................................................................ 445
WDT Module Block Diagram .............................................................................. 482
ADC Module Block Diagram ............................................................................... 507
ADC Sample Phases ......................................................................................... 510
Sample Averaging Example ............................................................................... 511
ADC Input Equivalency Diagram ......................................................................... 512
Internal Voltage Conversion Result ..................................................................... 513
External Voltage Conversion Result .................................................................... 514
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January 21, 2012
Texas Instruments-Production Data