LM3S5737 Datasheet, PDF (728/833 Pages) Texas Instruments – Stellaris® LM3S5737 Microcontroller

Universal Serial Bus (USB) Controller
Bit/Field
0
Name
RXRDY
Type
R/W
Reset
0
Description
Receive Packet Ready
Value Description
0 No data packet has been received.
1 A data packet has been received. The EPn bit in the USBRXIS
register is also set in this situation.
If the AUTOCLR bit in the USBRXCSRHn register is set, then the this bit
is automatically cleared when a packet of USBRXMAXPn bytes has
been unloaded from the receive FIFO. If the AUTOCLR bit is clear, or if
packets of less than the maximum packet size are unloaded, then
software must clear this bit manually when the packet has been unloaded
from the receive FIFO.
Device Mode
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1)
Base 0x4005.0000
Offset 0x116
Type R/W, reset 0x00
7
6
5
4
3
2
1
0
CLRDT STALLED STALL FLUSH DATAERR OVER FULL RXRDY
Type W1C
R/W
R/W
W1S
RO
R/W
RO
R/W
Reset
0
0
0
0
0
0
0
0
Bit/Field
7
6
5
Name
CLRDT
STALLED
STALL
Type
W1C
R/W
R/W
Reset
0
0
0
Description
Clear Data Toggle
Writing a 1 to this bit clears the DT bit in the USBRXCSRHn register.
Endpoint Stalled
Value Description
0 A STALL handshake has not been transmitted.
1 A STALL handshake has been transmitted.
Software must clear this bit.
Send STALL
Value Description
0 No effect.
1 Issues a STALL handshake.
Software must clear this bit to terminate the STALL condition.
Note: This bit has no effect where the endpoint is being used for
isochronous transfers.
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November 17, 2011
Texas Instruments-Production Data