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LM3S5737 Datasheet, PDF (24/833 Pages) Texas Instruments – Stellaris® LM3S5737 Microcontroller
Table of Contents
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USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 715
USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 716
USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 717
USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 717
USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 717
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 721
USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 721
USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 721
USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 725
USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 725
USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 725
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 726
USB Receive Control and Status Endpoint 2 Low (USBRXCSRL2), offset 0x126 ............... 726
USB Receive Control and Status Endpoint 3 Low (USBRXCSRL3), offset 0x136 ............... 726
USB Receive Control and Status Endpoint 1 High (USBRXCSRH1), offset 0x117 .............. 731
USB Receive Control and Status Endpoint 2 High (USBRXCSRH2), offset 0x127 .............. 731
USB Receive Control and Status Endpoint 3 High (USBRXCSRH3), offset 0x137 .............. 731
USB Receive Byte Count Endpoint 1 (USBRXCOUNT1), offset 0x118 .............................. 735
USB Receive Byte Count Endpoint 2 (USBRXCOUNT2), offset 0x128 .............................. 735
USB Receive Byte Count Endpoint 3 (USBRXCOUNT3), offset 0x138 .............................. 735
USB Host Transmit Configure Type Endpoint 1 (USBTXTYPE1), offset 0x11A ................... 736
USB Host Transmit Configure Type Endpoint 2 (USBTXTYPE2), offset 0x12A ................... 736
USB Host Transmit Configure Type Endpoint 3 (USBTXTYPE3), offset 0x13A ................... 736
USB Host Transmit Interval Endpoint 1 (USBTXINTERVAL1), offset 0x11B ....................... 737
USB Host Transmit Interval Endpoint 2 (USBTXINTERVAL2), offset 0x12B ....................... 737
USB Host Transmit Interval Endpoint 3 (USBTXINTERVAL3), offset 0x13B ....................... 737
USB Host Configure Receive Type Endpoint 1 (USBRXTYPE1), offset 0x11C ................... 738
USB Host Configure Receive Type Endpoint 2 (USBRXTYPE2), offset 0x12C ................... 738
USB Host Configure Receive Type Endpoint 3 (USBRXTYPE3), offset 0x13C ................... 738
USB Host Receive Polling Interval Endpoint 1 (USBRXINTERVAL1), offset 0x11D ............. 739
USB Host Receive Polling Interval Endpoint 2 (USBRXINTERVAL2), offset 0x12D ............ 739
USB Host Receive Polling Interval Endpoint 3 (USBRXINTERVAL3), offset 0x13D ............ 739
USB Request Packet Count in Block Transfer Endpoint 1 (USBRQPKTCOUNT1), offset
0x304 ........................................................................................................................... 740
USB Request Packet Count in Block Transfer Endpoint 2 (USBRQPKTCOUNT2), offset
0x308 ........................................................................................................................... 740
USB Request Packet Count in Block Transfer Endpoint 3 (USBRQPKTCOUNT3), offset
0x30C ........................................................................................................................... 740
USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS), offset 0x340 ............. 741
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS), offset 0x342 ............ 742
USB External Power Control (USBEPC), offset 0x400 ...................................................... 743
USB External Power Control Raw Interrupt Status (USBEPCRIS), offset 0x404 ................. 746
USB External Power Control Interrupt Mask (USBEPCIM), offset 0x408 ............................ 747
USB External Power Control Interrupt Status and Clear (USBEPCISC), offset 0x40C ......... 748
USB Device RESUME Raw Interrupt Status (USBDRRIS), offset 0x410 ............................ 749
USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414 ....................................... 750
USB Device RESUME Interrupt Status and Clear (USBDRISC), offset 0x418 .................... 751
USB General-Purpose Control and Status (USBGPCS), offset 0x41C ............................... 752
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November 17, 2011
Texas Instruments-Production Data