LM3S5737 Datasheet, PDF (318/833 Pages) Texas Instruments – Stellaris® LM3S5737 Microcontroller

Micro Direct Memory Access (μDMA)
Register 6: DMA Channel Control Base Pointer (DMACTLBASE), offset 0x008
The DMACTLBASE register must be configured so that the base pointer points to a location in
system memory.
The amount of system memory that you must assign to the controller depends on the number of
DMA channels used and whether you configure it to use the alternate channel control data structure.
See “Channel Configuration” on page 290 for details about the Channel Control Table. The base
address must be aligned on a 1024-byte boundary. You cannot read this register when the controller
is in the reset state.
DMA Channel Control Base Pointer (DMACTLBASE)
Base 0x400F.F000
Offset 0x008
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
ADDR
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
reserved
Type R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:10
9:0
Name
ADDR
reserved
Type
R/W
RO
Reset
0x00
0x00
Description
Channel Control Base Address
Pointer to the base address of the channel control table. The base
address must be 1024-byte aligned.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
318
November 17, 2011
Texas Instruments-Production Data